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dc.contributor.authorPara, Wamiq
dc.contributor.authorGuerrero, Paul
dc.contributor.authorKelly, Tom
dc.contributor.authorGuibas, Leonidas
dc.contributor.authorWonka, Peter
dc.date.accessioned2020-12-01T10:18:37Z
dc.date.available2020-12-01T10:18:37Z
dc.date.issued2020-11-26
dc.identifier.urihttp://hdl.handle.net/10754/666180
dc.description.abstractWe propose a new generative model for layout generation. We generate layouts in three steps. First, we generate the layout elements as nodes in a layout graph. Second, we compute constraints between layout elements as edges in the layout graph. Third, we solve for the final layout using constrained optimization. For the first two steps, we build on recent transformer architectures. The layout optimization implements the constraints efficiently. We show three practical contributions compared to the state of the art: our work requires no user input, produces higher quality layouts, and enables many novel capabilities for conditional layout generation.
dc.publisherarXiv
dc.relation.urlhttps://arxiv.org/pdf/2011.13417
dc.rightsArchived with thanks to arXiv
dc.titleGenerative Layout Modeling using Constraint Graphs
dc.typePreprint
dc.contributor.departmentComputer Science Program
dc.contributor.departmentComputer Science
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
dc.contributor.departmentVisual Computing Center (VCC)
dc.eprint.versionPre-print
dc.contributor.institutionAdobe Research
dc.contributor.institutionUniversity of Leeds
dc.contributor.institutionStanford University
dc.identifier.arxivid2011.13417
kaust.personPara, Wamiq
kaust.personWonka, Peter
refterms.dateFOA2020-12-01T10:19:12Z


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