Design Exploration of Sensing Techniques in 2T-2R Resistive Ternary CAMs

Abstract

In-Memory Computing (IMC) is considered a great candidate to replace von-Neumann computing architecture to overcome the memory wall. Ternary content-addressable memories are the main building blocks in IMC-based architectures, such as the associative processors. In this paper, we present a juxtaposition between the capacitive and resistive sensing in 2T-2R TCAMs. A Figure of Merit, function of the dynamic range, latency, and energy, is defined to have a fair comparison between the two sensing techniques. A mathematical model for the transient behavior of both sensing schemes has been derived and verified through SPICE simulations. We studied the performance with an in-memory addition application. Results from various scenarios show that the resistive sensing outperforms the capacitive one in both theoretical and application-based contexts.