Multi-Level Nanoimprint Lithography for Large-Area Thin Film Transistor Backplane Manufacturing
de Riet, Joris
Jisk Kronemeijer, Auke
Online Publication Date2020-06-30
Print Publication Date2020-07-01
Permanent link to this recordhttp://hdl.handle.net/10754/664010
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AbstractThin film transistors (TFTs) are the basis for current AMOLED display arrays. For next- generation displays, higher resolution and cost-effective manufacturing of panels is adamant. The current benchmark patterning method in the display industry is photolithography. Here, we propose the use of a hybrid approach of nanoimprint lithography and conventional FPD processing for the realization of high-resolution display backplanes. We demonstrate the realization of sub-micron amorphous oxide semiconductor TFTs with multi-level nanoimprint lithography in order to decrease the number of patterning steps in display manufacturing. Top-gate self-aligned a-IGZO TFTs are realized with performance comparable to benchmark photolithography-based TFTs.
CitationDogan, T., de Riet, J., Bel, T., Verbeek, R., Katsouras, I., Meulenkamp, E., … Jisk Kronemeijer, A. (2020). Multi-Level Nanoimprint Lithography for Large-Area Thin Film Transistor Backplane Manufacturing. Journal of Photopolymer Science and Technology, 33(2), 241–244. doi:10.2494/photopolymer.33.241
SponsorsThis work is financed through the Flexlines project within the Interreg V-programme FlandersThe Netherlands, a cross-border cooperation programme with financial support from the European Regional Development Fund, and co financed by the Province of Noord-Brabant, The Netherlands, and King Abdullah University of Science and Technology (KAUST) OSR-CRF CRG funding.