Improved circuit model for all-spin logic

Abstract
Spintronic devices are prime candidates for Beyond CMOS era due to their potential for low power consumption and high density computation and storage. All-spin logic (ASL) is among the most promising spintronic logic switches. Previous attempts to model ASL in the linear and diffusive regime either neglect the dynamic characteristics of the transport or do not provide a scalable and robust platform for full micromagnetic simulations and inclusion of other effects like spin Hall effect (SHE) and spin-orbit torque (SOT). In this paper, and based on a finite difference scheme, we propose an improved self-consisting magnetization dynamics/time-dependent carrier transport model that captures the main characteristics of ASL devices.

Publisher
Institute of Electrical and Electronics Engineers (IEEE)

Conference/Event Name
2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)

DOI
10.1145/2950067.2950075

Additional Links
https://ieeexplore.ieee.org/document/7568640/https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7568640

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