A Low Power Hardware Implementation of Izhikevich Neuron using Stochastic Computing
KAUST DepartmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Electrical Engineering Program
Permanent link to this recordhttp://hdl.handle.net/10754/653052
MetadataShow full item record
AbstractThis paper introduces the hardware implementation of one of the most popular spiking neuron models which is Izhikevich model. The main target of this implementation is to reduce area and power consumed by the Spiking Neural Network (SNN) neurons as the SNN consists of a large number of neurons to mimic the human brain. Therefore, stochastic computing techniques are used to perform the squaring term that consumes much of the power in the Izhikevich neuron model equations. A hardware implementation of the model is proposed to show the area and power consumption to help the SNN designers to choose between stochastic-based multipliers and the approximate multipliers considering their power, area, and accuracy constraints.
CitationIsmail AA, Shaheen ZA, Rashad O, Salama KN, Mostafa H (2018) A Low Power Hardware Implementation of Izhikevich Neuron using Stochastic Computing. 2018 30th International Conference on Microelectronics (ICM). Available: http://dx.doi.org/10.1109/icm.2018.8704080.
SponsorsThis work was partially funded by ONE Lab at Zewail City of Science and Technology, Egypt and Cairo University, Egypt.