A Compact Adder and Reprogrammable Logic Gate Using Micro-electromechanical Resonators with Partial Electrodes
KAUST DepartmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Electrical Engineering Program
Mechanical Engineering Program
Physical Science and Engineering (PSE) Division
KAUST Grant NumberOSR-2016-CRG5-3001
Online Publication Date2019-02-19
Print Publication Date2019
Permanent link to this recordhttp://hdl.handle.net/10754/631362
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AbstractIn this work, the design principles and experimental demonstration of a compact full adder along with a reprogrammable 4 input logic gate are presented. The proposed solution for implementation of digital circuits is based on a clamped-clamped micro-beam resonator with multiple split electrodes, in which the logic inputs tune the resonance frequency of the beam. This technique enables re-programmability during operation, and reduces the complexity of the digital logic design significantly; as an example, for a 64-bit adder, only 128 micro-resonators are required, compared to more than 1500 transistors for standard CMOS architectures. We also show that an optimized simulated micro-resonator based full adder is 45 times smaller than a CMOS mirror adder in 65nm Technology. While the energy consumption of this early generation of micro-resonator logic gates is higher than the CMOS solutions, we show that by careful device optimization and shrinking of the dimensions, femtojoules energy consumption and MHz operation, required by internet of things (IoT) applications, are attainable.
CitationAhmed S, Ilyas S, Zou X, Jaber N, Younis MI, et al. (2019) A Compact Adder and Reprogrammable Logic Gate Using Micro-electromechanical Resonators with Partial Electrodes. IEEE Transactions on Circuits and Systems II: Express Briefs: 1–1. Available: http://dx.doi.org/10.1109/TCSII.2019.2899938.
SponsorsThis work is supported by King Abdullah University of Science and Technology (KAUST) office of sponsored research (OSR) under Award No. OSR-2016-CRG5-3001.