StrongARM Latch Comparator Performance Enhancement by Implementing Clocked Forward Body Biasing
Almansouri, Abdullah Saud Mohammed
Al Attar, Talal
KAUST DepartmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Electrical Engineering Program
Online Publication Date2019-01-24
Print Publication Date2018-12
Permanent link to this recordhttp://hdl.handle.net/10754/631288
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AbstractIn this paper, we propose a forward body biasing technique to enhance the performance of the StrongARM comparators. We apply this technique, which is mainly based on clocked tuning of the threshold voltage of the NMOS cross-coupled transistors, to different architectures, namely: Kobayashi, Razavi, and Improved StrongARM comparators. The circuits are simulated in the standard 65nm CMOS technology and performance improvement of up to 20.8% has been achieved while maintaining the same energy loss.
CitationAlshehri A, Al-Qadasi M, Almansouri AS, Al-Attar T, Fariborzi H (2018) StrongARM Latch Comparator Performance Enhancement by Implementing Clocked Forward Body Biasing. 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS). Available: http://dx.doi.org/10.1109/icecs.2018.8617903.
Conference/Event name2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)