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dc.contributor.authorDuran Retamal, Jose Ramon
dc.contributor.authorHo, Chih-Hsiang
dc.contributor.authorTsai, Kun-Tong
dc.contributor.authorKe, Jr-Jian
dc.contributor.authorHe, Jr-Hau
dc.date.accessioned2019-01-22T12:35:38Z
dc.date.available2019-01-22T12:35:38Z
dc.date.issued2019-01-01
dc.identifier.citationRetamal JRD, Ho C-H, Tsai K-T, Ke J-J, He J-H (2019) Self-Organized Al Nanotip Electrodes for Achieving Ultralow-Power and Error-Free Memory. IEEE Transactions on Electron Devices: 1–6. Available: http://dx.doi.org/10.1109/ted.2018.2888873.
dc.identifier.issn0018-9383
dc.identifier.issn1557-9646
dc.identifier.doi10.1109/ted.2018.2888873
dc.identifier.urihttp://hdl.handle.net/10754/630933
dc.description.abstractResistive random access memory (ReRAM), a new emerging nonvolatile memory technology based on changes in electrical resistivity of a dielectric film, offers promising advantages such as scalability, fast switching, and low operation voltage. However, for ReRAM to become a successful technology, it is necessary to accurately control the stochastic nature of the conductive nanoscale filaments (CNFs) that governs the resistive switching (RS) behavior of the device and limits its long-term stability and reliability. In this paper, we developed a highly scalable nanostructured/textured electrode that is composed of an array of Al nanotips based on an anodic aluminum oxide template. The nanotips improve the RS characteristics by intensifying the electric field at the apex of each nanotip which is demonstrated using numerical simulations. The localized electric field induces the repetitive nucleation/formation/rupture of the CNFs in a more controlled fashion compared to a flat Al electrode. As a result, the nanotip sample exhibits uniform and reduced forming/reset voltages as low as 4.70 ± 0.98 V/1.00 ± 0.19 V, stable endurance, and long-term retention. As a result, we were able to achieve ultralow-power and error-free operation of 100 cells covering a large area, significantly demonstrating improved uniformity and reliability compared to devices made using flat Al electrodes. This universal bottom-up strategy of self-organized nanostructured-electrodes provides a pathway toward large-scale, highly reliable, and RS memory devices.
dc.description.sponsorshipThe authors would like to thank Y.-L. Wang, Academia Sinica, Taipei, Taiwan, for the device structure fabrication and E. S. Mungan, Purdue University, West Lafayette, IN, USA, for her feedback on device performance.
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.relation.urlhttps://ieeexplore.ieee.org/document/8599128
dc.subjectAnodic aluminum oxide (AAO)
dc.subjectfield enhancement
dc.subjectnanostructured materials
dc.subjectnanotip
dc.subjectresistive random access memory (ReRAM)
dc.subjectsurface texturing.
dc.titleSelf-Organized Al Nanotip Electrodes for Achieving Ultralow-Power and Error-Free Memory
dc.typeArticle
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
dc.contributor.departmentElectrical Engineering Program
dc.contributor.departmentKAUST Solar Center (KSC)
dc.contributor.departmentNano Energy Lab
dc.contributor.departmentPhysical Science and Engineering (PSE) Division
dc.identifier.journalIEEE Transactions on Electron Devices
dc.contributor.institutionDepartment of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907 USA.
dc.contributor.institutionInstitute of Atomic and Molecular Sciences, Academia Sinica, Taipei 10617, Taiwan.
kaust.personDuran Retamal, Jose Ramon
kaust.personKe, Jr-Jian
kaust.personHe, Jr-Hau
dc.date.published-online2019-01-01
dc.date.published-print2019-02


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