KAUST DepartmentPhysical Sciences and Engineering (PSE) Division
Mechanical Engineering Program
Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Electrical Engineering Program
KAUST Grant NumberOSR-2016-CRG5-3001
Online Publication Date2018-11-30
Print Publication Date2019-01-01
Permanent link to this recordhttp://hdl.handle.net/10754/629954
MetadataShow full item record
AbstractMicro/nano-electromechanical resonator-based logic elements have emerged recently as an attractive potential alternative to semiconductor electronics. The next step for this technology platform to make it into practical applications and to build complex computing operations beyond the fundamental logic gates is to develop cascadable logic units. Such units should produce outputs that can be used as inputs for the next logic units. Despite the recent developments in electromechanical computing, this requirement has remained elusive. Here, we demonstrate for the first time a conceptual framework for cascadable logic units. Cascadability is experimentally demonstrated through two case studies; one by cascading two OR logic gates. The other case is the universal NOR logic gate realized by cascading an OR and a NOT gate. The logic operations are performed by on-demand activation and deactivation of the second mode of vibration of a clamped-clamped microbeam resonator. We show that the demonstrated approach significantly lowers the complexity and number of microresonator-based logic functions compared to the CMOS-based counterparts, which improves energy efficiency. This can potentially lead toward the realization of a novel technology platform for an alternative computing paradigm.
CitationIlyas S, Ahmed S, Hafiz MAA, Fariborzi H, Younis MI (2018) Cascadable Microelectromechanical Resonator Logic Gate. Journal of Micromechanics and Microengineering. Available: http://dx.doi.org/10.1088/1361-6439/aaf0e6.
SponsorsAuthors acknowledge Mr. Ren Li from Integrated Circuits and Systems Group, CEMSE Division, KAUST for his help with energy cost analysis for CMOS. This publication is based upon work supported by the King Abdullah University of Science and Technology (KAUST) office of sponsored research OSR under Award No. OSR-2016-CRG5-3001.