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    Optimizations of Unstructured Aerodynamics Computations for Many-core Architectures

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    Type
    Article
    Authors
    Al Farhan, Mohammed cc
    Keyes, David E. cc
    KAUST Department
    Applied Mathematics and Computational Science Program
    Computer Science Program
    Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
    ECRC, KAUST, Jeddah, Jeddah Saudi Arabia
    Extreme Computing Research Center
    Date
    2018-04-13
    Online Publication Date
    2018-04-13
    Print Publication Date
    2018
    Permanent link to this record
    http://hdl.handle.net/10754/627692
    
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    Abstract
    We investigate several state-of-the-practice shared-memory optimization techniques applied to key routines of an unstructured computational aerodynamics application with irregular memory accesses. We illustrate for the Intel KNL processor, as a representative of the processors in contemporary leading supercomputers, identifying and addressing performance challenges without compromising the floating point numerics of the original code. We employ low and high-level architecture-specific code optimizations involving thread and data-level parallelism. Our approach is based upon a multi-level hierarchical distribution of work and data across both the threads and the SIMD units within every hardware core. On a 64-core KNL chip, we achieve nearly 2.9x speedup of the dominant routines relative to the baseline. These exhibit almost linear strong scalability up to 64 threads, and thereafter some improvement with hyperthreading. At substantially fewer Watts, we achieve up to 1.7x speedup relative to the performance of 72 threads of a 36-core Haswell CPU and roughly equivalent performance to 112 threads of a 56-core Skylake scalable processor. These optimizations are expected to be of value for many other unstructured mesh PDE-based scientific applications as multi and many-core architecture evolves.
    Citation
    Al Farhan MA, Keyes D (2018) Optimizations of Unstructured Aerodynamics Computations for Many-core Architectures. IEEE Transactions on Parallel and Distributed Systems: 1–1. Available: http://dx.doi.org/10.1109/TPDS.2018.2826533.
    Sponsors
    Support in the form of computing resources was provided by KAUST Extreme Computing Research Center, KAUST Supercomputing Laboratory, KAUST Information Technology Research Division, and Intel Parallel Computing Centers.
    Publisher
    Institute of Electrical and Electronics Engineers (IEEE)
    Journal
    IEEE Transactions on Parallel and Distributed Systems
    DOI
    10.1109/TPDS.2018.2826533
    Additional Links
    https://ieeexplore.ieee.org/document/8337750/
    ae974a485f413a2113503eed53cd6c53
    10.1109/TPDS.2018.2826533
    Scopus Count
    Collections
    Articles; Applied Mathematics and Computational Science Program; Extreme Computing Research Center; Computer Science Program; Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division

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