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dc.contributor.authorBerco, Dan
dc.contributor.authorChand, Umesh
dc.date.accessioned2018-04-15T07:13:35Z
dc.date.available2018-04-15T07:13:35Z
dc.date.issued2018-03-08
dc.identifier.citationBerco D, Chand U (2018) Numerical analysis of a polysilicon-based resistive memory device. Journal of Computational Electronics. Available: http://dx.doi.org/10.1007/s10825-018-1154-4.
dc.identifier.issn1569-8025
dc.identifier.issn1572-8137
dc.identifier.doi10.1007/s10825-018-1154-4
dc.identifier.urihttp://hdl.handle.net/10754/627459
dc.description.abstractThis study investigates a conductive bridge resistive memory device based on a Cu top electrode, 10-nm polysilicon resistive switching layer and a TiN bottom electrode, by numerical analysis for $10^{3}$103 programming and erase simulation cycles. The low and high resistive state values in each cycle are calculated, and the analysis shows that the structure has excellent retention reliability properties. The presented Cu species density plot indicates that Cu insertion occurs almost exclusively along grain boundaries resulting in a confined isomorphic conductive filament that maintains its overall shape and electric properties during cycling. The superior reliability of this structure may thus be attributed to the relatively low amount of Cu migrating into the RSL during initial formation. In addition, the results show a good match and help to confirm experimental measurements done over a previously demonstrated device.
dc.publisherSpringer Nature
dc.relation.urlhttp://link.springer.com/article/10.1007/s10825-018-1154-4
dc.subjectConductive bridge resistive switching memory (CBRAM)
dc.subjectNumerical simulation
dc.subjectPolysilicon
dc.subjectCu
dc.subjectReliability
dc.subjectDegradation
dc.titleNumerical analysis of a polysilicon-based resistive memory device
dc.typeArticle
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
dc.contributor.departmentElectrical Engineering Program
dc.identifier.journalJournal of Computational Electronics
dc.contributor.institutionSchool of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, Singapore
kaust.personChand, Umesh
dc.date.published-online2018-03-08
dc.date.published-print2018-06


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