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dc.contributor.authorCharara, Ali
dc.contributor.authorKeyes, David E.
dc.contributor.authorLtaief, Hatem
dc.date.accessioned2018-04-04T08:48:17Z
dc.date.available2018-04-04T08:48:17Z
dc.date.issued2018-02
dc.identifier.urihttp://hdl.handle.net/10754/627402
dc.description.abstractDense General Matrix-Matrix (GEMM) multiplication is a core operation of the Basic Linear Algebra Subroutines (BLAS) library, and therefore, often resides at the bottom of the traditional software stack for most of the scientific applications. In fact, chip manufacturers give a special attention to the GEMM kernel implementation since this is exactly where most of the high-performance software libraries extract the hardware performance. With the emergence of big data applications involving large data-sparse, hierarchically low-rank matrices, the off-diagonal tiles can be compressed to reduce the algorithmic complexity and the memory footprint. The resulting tile low-rank (TLR) data format is composed of small data structures, which retains the most significant information for each tile. However, to operate on low-rank tiles, a new GEMM operation and its corresponding API have to be designed on GPUs so that it can exploit the data sparsity structure of the matrix while leveraging the underlying TLR compression format. The main idea consists in aggregating all operations onto a single kernel launch to compensate for their low arithmetic intensities and to mitigate the data transfer overhead on GPUs. The new TLR GEMM kernel outperforms the cuBLAS dense batched GEMM by more than an order of magnitude and creates new opportunities for TLR advance algorithms.
dc.subjectHierarchical Low-Rank Matrix Computations
dc.subjectMatrix Multiplication - GEMM
dc.subjectHigh Performance Computing
dc.subjectGPU Computing
dc.subjectKBLAS
dc.titleBatched Tile Low-Rank GEMM on GPUs
dc.typeTechnical Report
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
refterms.dateFOA2018-06-13T17:42:58Z


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