Design and analysis of 2T-2M Ternary content addressable memories
Fouda, M. E.
Zidan, Mohammed A.
Eltawil, A. M.
Salama, Khaled N.
KAUST DepartmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Electrical Engineering Program
Physical Sciences and Engineering (PSE) Division
Permanent link to this recordhttp://hdl.handle.net/10754/626785
MetadataShow full item record
AbstractAssociate and approximate computing using resistive memory based Ternary Content Addressable Memory is becoming widely used. In this paper, a simplified model based analysis of a 2T2M-Ternary Content Addressable Memory using memristors is introduced. A comprehensive study is presented taking into consideration different circuit parameters and parasitic effects. Parameters such as the memristor Rh/Rl ratio, transistor technology, operating frequency, and memory width are taken into consideration. The proposed model is verified with SPICE showing a high degree of matching between theory and simulation. The utility of the model is established using a design example.
CitationBahloul MA, Fouda ME, Naous R, Zidan MA, Eltawil AM, et al. (2017) Design and analysis of 2T-2M Ternary content addressable memories. 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS). Available: http://dx.doi.org/10.1109/mwscas.2017.8053201.
Conference/Event name60th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2017