KAUST DepartmentPhysical Sciences and Engineering (PSE) Division
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AbstractTwo-dimensional (2D) materials are drawing growing attention for next-generation electronics and optoelectronics owing to its atomic thickness and unique physical properties. One of the challenges posed by 2D materials is the large source/drain (S/D) series resistance due to their thinness, which may be resolved by thickening the source and drain regions. Recently explored lateral graphene–MoS21−3 and graphene–WS21,4 heterostructures shed light on resolving the mentioned issues owing to their superior ohmic contact behaviors. However, recently reported field-effect transistors (FETs) based on graphene–TMD heterostructures have only shown n-type characteristics. The lack of p-type transistor limits their applications in complementary metal-oxide semiconductor electronics. In this work, we demonstrate p-type FETs based on graphene–WSe2 lateral heterojunctions grown with the scalable CVD technique. Few-layer WSe2 is overlapped with the multilayer graphene (MLG) at MLG–WSe2 junctions such that the contact resistance is reduced. Importantly, the few-layer WSe2 only forms at the junction region while the channel is still maintained as a WSe2 monolayer for transistor operation. Furthermore, by imposing doping to graphene S/D, 2 orders of magnitude enhancement in Ion/Ioff ratio to ∼108 and the unipolar p-type characteristics are obtained regardless of the work function of the metal in ambient air condition. The MLG is proposed to serve as a 2D version of emerging raised source/drain approach in electronics.
CitationTang H-L, Chiu M-H, Tseng C-C, Yang S-H, Hou K-J, et al. (2017) Multilayer Graphene–WSe2 Heterostructures for WSe2 Transistors. ACS Nano 11: 12817–12823. Available: http://dx.doi.org/10.1021/acsnano.7b07755.
SponsorsThis research was funded by King Abdullah University of Science & Technology (Saudi Arabia). We would also like to acknowledge the support from Nanofabrication Core Lab in KAUST.
PublisherAmerican Chemical Society (ACS)
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