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dc.contributor.authorBerco, Dan
dc.contributor.authorChand, Umesh
dc.contributor.authorFariborzi, Hossein
dc.date.accessioned2017-10-30T07:55:29Z
dc.date.available2017-10-30T07:55:29Z
dc.date.issued2017-10-23
dc.identifier.citationBerco D, Chand U, Fariborzi H (2017) A numerical analysis and experimental demonstration of a low degradation conductive bridge resistive memory device. Journal of Applied Physics 122: 164502. Available: http://dx.doi.org/10.1063/1.5008727.
dc.identifier.issn0021-8979
dc.identifier.issn1089-7550
dc.identifier.doi10.1063/1.5008727
dc.identifier.urihttp://hdl.handle.net/10754/625958
dc.description.abstractThis study investigates a low degradation metal-ion conductive bridge RAM (CBRAM) structure. The structure is based on placing a diffusion blocking layer (DBL) between the device's top electrode (TE) and the resistive switching layer (RSL), unlike conventional CBRAMs, where the TE serves as a supply reservoir for metallic species diffusing into the RSL to form a conductive filament (CF) and is kept in direct contact with the RSL. The properties of a conventional CBRAM structure (Cu/HfO2/TiN), having a Cu TE, 10 nm HfO2 RSL, and a TiN bottom electrode, are compared with a 2 nm TaN DBL incorporating structure (Cu/TaN/HfO2/TiN) for 103 programming and erase simulation cycles. The low and high resistive state values for each cycle are calculated and the analysis reveals that adding the DBL yields lower degradation. In addition, the 2D distribution plots of oxygen vacancies, O ions, and Cu species within the RSL indicate that oxidation occurring in the DBL-RSL interface results in the formation of a sub-stoichiometric tantalum oxynitride with higher blocking capabilities that suppresses further Cu insertion beyond an initial CF formation phase, as well as CF lateral widening during cycling. The higher endurance of the structure with DBL may thus be attributed to the relatively low amount of Cu migrating into the RSL during the initial CF formation. Furthermore, this isomorphic CF displays similar cycling behavior to neural ionic channels. The results of numerical analysis show a good match to experimental measurements of similar device structures as well
dc.description.sponsorshipThe experimental data presented in this work were obtained by the support of the Nano-fabrication Core Lab at King Abdullah University of Science and Technology (KAUST).
dc.publisherAIP Publishing
dc.relation.urlhttp://aip.scitation.org/doi/10.1063/1.5008727
dc.rightsArchived with thanks to Journal of Applied Physics
dc.titleA numerical analysis and experimental demonstration of a low degradation conductive bridge resistive memory device
dc.typeArticle
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
dc.identifier.journalJournal of Applied Physics
dc.eprint.versionPublisher's Version/PDF
dc.contributor.institutionNanyang Technological University, School of Electrical and Electronic Engineering, 50 Nanyang Avenue, Singapore, Singapore 639798
kaust.personChand, Umesh
kaust.personFariborzi, Hossein


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