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Final Dissertation_Rawan Naous.pdf
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Final Dissertation
Type
DissertationAuthors
Naous, Rawan
Advisors
Salama, Khaled N.
Committee members
Magistretti, Pierre J.
Alouini, Mohamed-Slim

Shihada, Basem

Kurdahi, Fadi
Date
2017-05Embargo End Date
2018-06-01Permanent link to this record
http://hdl.handle.net/10754/623652
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At the time of archiving, the student author of this dissertation opted to temporarily restrict access to it. The full text of this dissertation became available to the public after the expiration of the embargo on 2018-06-01.Abstract
An extensive reliance on technology, an abundance of data, and increasing processing requirements have imposed severe challenges on computing and data processing. Moreover, the roadmap for scaling electronic components faces physical and reliability limits that hinder the utilization of the transistors in conventional systems and promotes the need for faster, energy-efficient, and compact nano-devices. This work thus capitalizes on emerging non-volatile memory technologies, particularly the memristor for steering novel design directives. Moreover, aside from the conventional deterministic operation, a temporal variability is encountered in the devices functioning. This inherent stochasticity is addressed as an enabler for endorsing the stochastic electronics field of study. We tackle this approach of design by proposing and verifying a statistical approach to modelling the stochastic memristors behaviour. This mode of operation allows for innovative computing designs within the approximate computing and beyond Von-Neumann domains. In the context of approximate computing, sacrificing functional accuracy for the sake of energy savings is proposed based on inherently stochastic electronic components. We introduce mathematical formulation and probabilistic analysis for Boolean logic operators and correspondingly incorporate them into arithmetic blocks. Gate- and system-level accuracy of operation is presented to convey configurability and the different effects that the unreliability of the underlying memristive components has on the intermediary and overall output. An image compression application is presented to reflect the efficiency attained along with the impact on the output caused by the relative precision quantification. In contrast, in neuromorphic structures the memristors variability is mapped onto abstract models of the noisy and unreliable brain components. In one approach, we propose using the stochastic memristor as an inherent source of variability in the neuron that allows it to produce spikes stochastically. Alternatively, the stochastic memristors are mapped onto bi-stable stochastic synapses. The intrinsic variation is modelled as added noise that aids in performing the underlying computational tasks. Both aspects are tested within a probabilistic neural network operation for a handwritten MNIST digit recognition application. Synaptic adaptation and neuronal selectivity are achieved with both approaches, which demonstrates the savings, interchangeability, robustness, and relaxed design space of brain-inspired unconventional computing systems.Citation
Naous, R. (2017). Von-Neumann and Beyond: Memristor Architectures. KAUST Research Repository. https://doi.org/10.25781/KAUST-LUT70ae974a485f413a2113503eed53cd6c53
10.25781/KAUST-LUT70