An Efficient Topology-Based Algorithm for Transient Analysis of Power Grid
KAUST DepartmentComputational Bioscience Research Center (CBRC)
Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Permanent link to this recordhttp://hdl.handle.net/10754/622132
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AbstractIn the design flow of integrated circuits, chip-level verification is an important step that sanity checks the performance is as expected. Power grid verification is one of the most expensive and time-consuming steps of chip-level verification, due to its extremely large size. Efficient power grid analysis technology is highly demanded as it saves computing resources and enables faster iteration. In this paper, a topology-base power grid transient analysis algorithm is proposed. Nodal analysis is adopted to analyze the topology which is mathematically equivalent to iteratively solving a positive semi-definite linear equation. The convergence of the method is proved.
CitationYang L, Wang J, Azevedo L, Jing-Yan Wang J (2015) An Efficient Topology-Based Algorithm for Transient Analysis of Power Grid. Lecture Notes in Computer Science: 649–660. Available: http://dx.doi.org/10.1007/978-3-319-22180-9_65.
Conference/Event name11th International Conference on Intelligent Computing, ICIC 2015