• Login
    View Item 
    •   Home
    • Research
    • Articles
    • View Item
    •   Home
    • Research
    • Articles
    • View Item
    JavaScript is disabled for your browser. Some features of this site may not work without it.

    Browse

    All of KAUSTCommunitiesIssue DateSubmit DateThis CollectionIssue DateSubmit Date

    My Account

    Login

    Quick Links

    Open Access PolicyORCID LibguideTheses and Dissertations LibguideSubmit an Item

    Statistics

    Display statistics

    Split-Capacitance and Conductance-Frequency Characteristics of SOI Wafers in Pseudo-MOSFET Configuration

    • CSV
    • RefMan
    • EndNote
    • BibTex
    • RefWorks
    Type
    Article
    Authors
    Pirro, Luca cc
    Diab, Amer El Hajj
    Ionica, Irina
    Ghibaudo, Gerard
    Faraone, Lorenzo
    Cristoloveanu, Sorin
    KAUST Department
    Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
    Electrical Engineering Program
    Integrated Nanotechnology Lab
    Date
    2015-09
    Permanent link to this record
    http://hdl.handle.net/10754/594194
    
    Metadata
    Show full item record
    Abstract
    Recent experimental results have demonstrated the possibility of characterizing silicon-on-insulator (SOI) wafers through split C-V measurements in the pseudo-MOSFET configuration. This paper analyzes the capacitance and conductance versus frequency characteristics. We discuss the conditions under which it is possible to extract interface trap density in bare SOI wafers. The results indicate, through both measurements and simulations, that the signature due to interface trap density is present in small-area samples, but is masked by the RC response of the channel in regular, large-area ones, making the extraction in standard samples problematic. © 1963-2012 IEEE.
    Citation
    Pirro L, Diab A, Ionica I, Ghibaudo G, Faraone L, et al. (2015) Split-Capacitance and Conductance-Frequency Characteristics of SOI Wafers in Pseudo-MOSFET Configuration. IEEE Transactions on Electron Devices 62: 2717–2723. Available: http://dx.doi.org/10.1109/ted.2015.2454438.
    Sponsors
    Soitec, Bernin, France
    European ENIAC Projects Places2be
    Publisher
    Institute of Electrical and Electronics Engineers (IEEE)
    Journal
    IEEE Transactions on Electron Devices
    DOI
    10.1109/ted.2015.2454438
    ae974a485f413a2113503eed53cd6c53
    10.1109/ted.2015.2454438
    Scopus Count
    Collections
    Articles; Electrical and Computer Engineering Program; Integrated Nanotechnology Lab; Computer, Electrical and Mathematical Science and Engineering (CEMSE) Division

    entitlement

     
    DSpace software copyright © 2002-2022  DuraSpace
    Quick Guide | Contact Us | KAUST University Library
    Open Repository is a service hosted by 
    Atmire NV
     

    Export search results

    The export option will allow you to export the current search results of the entered query to a file. Different formats are available for download. To export the items, click on the button corresponding with the preferred download format.

    By default, clicking on the export buttons will result in a download of the allowed maximum amount of items. For anonymous users the allowed maximum amount is 50 search results.

    To select a subset of the search results, click "Selective Export" button and make a selection of the items you want to export. The amount of items that can be exported at once is similarly restricted as the full export.

    After making a selection, click one of the export format buttons. The amount of items that will be exported is indicated in the bubble next to export format.