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dc.contributor.authorNaous, Rawan
dc.contributor.authorAl-Shedivat, Maruan
dc.contributor.authorSalama, Khaled N.
dc.date.accessioned2015-11-05T05:51:42Z
dc.date.available2015-11-05T05:51:42Z
dc.date.issued2015-10-26
dc.identifier.citationStochasticity Modeling in Memristors 2015:1 IEEE Transactions on Nanotechnology
dc.identifier.issn1536-125X
dc.identifier.issn1941-0085
dc.identifier.doi10.1109/TNANO.2015.2493960
dc.identifier.urihttp://hdl.handle.net/10754/581778
dc.description.abstractDiverse models have been proposed over the past years to explain the exhibiting behavior of memristors, the fourth fundamental circuit element. The models varied in complexity ranging from a description of physical mechanisms to a more generalized mathematical modeling. Nonetheless, stochasticity, a widespread observed phenomenon, has been immensely overlooked from the modeling perspective. This inherent variability within the operation of the memristor is a vital feature for the integration of this nonlinear device into the stochastic electronics realm of study. In this paper, experimentally observed innate stochasticity is modeled in a circuit compatible format. The model proposed is generic and could be incorporated into variants of threshold-based memristor models in which apparent variations in the output hysteresis convey the switching threshold shift. Further application as a noise injection alternative paves the way for novel approaches in the fields of neuromorphic engineering circuits design. On the other hand, extra caution needs to be paid to variability intolerant digital designs based on non-deterministic memristor logic.
dc.language.isoen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.relation.urlhttp://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=7305797
dc.rights(c) 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/ republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works.
dc.titleStochasticity Modeling in Memristors
dc.typeArticle
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
dc.contributor.departmentElectrical Engineering Program
dc.identifier.journalIEEE Transactions on Nanotechnology
dc.eprint.versionPost-print
dc.contributor.institutionMachine Learning Department, Carnegie Mellon University, Pittsburgh, PA 15213, USA
dc.contributor.affiliationKing Abdullah University of Science and Technology (KAUST)
kaust.personNaous, Rawan
kaust.personSalama, Khaled N.
refterms.dateFOA2018-06-13T16:16:52Z
dc.date.published-online2015-10-26
dc.date.published-print2016-01


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