KAUST DepartmentIntegrated Nanotechnology Lab
Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Electrical Engineering Program
Permanent link to this recordhttp://hdl.handle.net/10754/564950
MetadataShow full item record
AbstractNeuromorphic computer will need folded architectural form factor to match brain cortex's folded pattern for ultra-compact design. In this work, we show a state-of-the-art CMOS compatible pragmatic fabrication approach of building structurally foldable and densely integrated neuromorphic devices for non-volatile memory applications. We report the first ever memristive devices with the size of a motor neuron on bulk mono-crystalline silicon (100) and then with trench-protect-release-recycle process transform the silicon wafer with devices into a flexible and semi-transparent silicon fabric while recycling the remaining wafer for further use. This process unconditionally offers the ultra-large-scale-integration opportunity-increasingly critical for ultra-compact memory.
Journal2014 14th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA)
Conference/Event name2014 14th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2014