Fibonacci-based hardware post-processing for non-autonomous signum hyperchaotic system
AuthorsMansingka, Abhinav S.
Barakat, Mohamed L.
Zidan, Mohammed A.
Radwan, Ahmed Gomaa
Salama, Khaled N.
KAUST DepartmentElectrical Engineering Program
Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Permanent link to this recordhttp://hdl.handle.net/10754/564830
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AbstractThis paper presents a hardware implementation of a robust non-autonomous hyperchaotic-based PRNG driven by a 256-bit LFSR. The original chaotic output is post-processed using a novel technique based on the Fibonacci series, bitwise XOR, rotation, and feedback. The proposed post-processing technique preserves the throughput of the system and enhances the randomness in the output which is verified by successfully passing all NIST SP. 800-22 tests. The system is realized on a Xilinx Virtex 4 FPGA achieving throughput up to 13.165 Gbits/s for 16-bit bus-width surpassing previously reported CB-PRNGs. © 2013 IEEE.
Conference/Event name2013 3rd International Conference on IT Convergence and Security, ICITCS 2013