AuthorsHussain, Aftab M.
Fahad, Hossain M.
Sevilla, Galo T.
Hussain, Muhammad Mustafa
KAUST DepartmentElectrical Engineering Program
Integrated Nanotechnology Lab
Materials Science and Engineering Program
Physical Sciences and Engineering (PSE) Division
Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Computational Physics and Materials Science (CPMS)
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AbstractWe study a group IV element: tin (Sn) by integrating it into silicon lattice, to enhance the performance of silicon CMOS. We have evaluated the electrical properties of the SiSn lattice by performing simulations using First-principle studies, followed by experimental device fabrication and characterization. We fabricated high-κ/metal gate based Metal-Oxide-Semiconductor capacitors (MOSCAPs) using SiSn as channel material to study the impact of Sn integration into silicon. © 2013 IEEE.
Conference/Event name2013 IEEE 8th Nanotechnology Materials and Devices Conference, IEEE NMDC 2013