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    Power gating of VLSI circuits using MEMS switches in low power applications

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    Type
    Conference Paper
    Authors
    Shobak, Hosam
    Ghoneim, Mohamed T. cc
    El Boghdady, Nawal
    Halawa, Sarah
    Iskander, Sophinese M.
    Anis, Mohab H.
    KAUST Department
    Electrical Engineering Program
    Date
    2011-12
    Permanent link to this record
    http://hdl.handle.net/10754/564472
    
    Metadata
    Show full item record
    Abstract
    Power dissipation poses a great challenge for VLSI designers. With the intense down-scaling of technology, the total power consumption of the chip is made up primarily of leakage power dissipation. This paper proposes combining a custom-designed MEMS switch to power gate VLSI circuits, such that leakage power is efficiently reduced while accounting for performance and reliability. The designed MEMS switch is characterized by an 0.1876 ? ON resistance and requires 4.5 V to switch. As a result of implementing this novel power gating technique, a standby leakage power reduction of 99% and energy savings of 33.3% are achieved. Finally the possible effects of surge currents and ground bounce noise are studied. These findings allow longer operation times for battery-operated systems characterized by long standby periods. © 2011 IEEE.
    Citation
    Shobak, H., Ghoneim, M., El Boghdady, N., Halawa, S., Iskander, S., & Anis, M. (2011). Power gating of VLSI circuits using MEMS switches in low power applications. ICM 2011 Proceeding. doi:10.1109/icm.2011.6177407
    Publisher
    Institute of Electrical and Electronics Engineers (IEEE)
    Journal
    ICM 2011 Proceeding
    Conference/Event name
    2011 23rd International Conference on Microelectronics, ICM 2011
    ISBN
    9781457722073
    DOI
    10.1109/ICM.2011.6177407
    ae974a485f413a2113503eed53cd6c53
    10.1109/ICM.2011.6177407
    Scopus Count
    Collections
    Conference Papers; Electrical and Computer Engineering Program

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