Design, implementation and analysis of fully digital 1-D controllable multiscroll chaos
Type
Conference PaperKAUST Department
Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) DivisionElectrical Engineering Program
Physical Science and Engineering (PSE) Division
Sensors Lab
Date
2011-12Permanent link to this record
http://hdl.handle.net/10754/564471
Metadata
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This paper introduces the fully digital implementation of a 1-D multiscroll chaos generator based on a staircase nonlinearity in the 3rd-order jerk system using the Euler approximation. For the first time, digital design is exploited to provide real-time controllability of (i) number of scrolls, (ii) position in 1-D space, (iii) Euler step size and (iv) system parameter. The effect of variations in these fields on the maximum Lyapunov exponent (MLE) is analyzed. The system is implemented using Verilog HDL and synthesized on an Xilinx Virtex 4 FPGA, exhibiting area utilization less than 3.5% and high performance with experimentally verified throughput up to 3.33 Gbits/s. This fully digital system enables applications in modulation schemes and chaos-based cryptosystems without analog to digital conversion. © 2011 IEEE.Citation
Mansingka, A. S., Radwan, A. G., & Salama, K. N. (2011). Design, implementation and analysis of fully digital 1-D controllable multiscroll chaos. ICM 2011 Proceeding. doi:10.1109/icm.2011.6177371Journal
ICM 2011 ProceedingConference/Event name
2011 23rd International Conference on Microelectronics, ICM 2011ISBN
9781457722073ae974a485f413a2113503eed53cd6c53
10.1109/ICM.2011.6177371