Show simple item record

dc.contributor.authorDadgour, Hamed F.
dc.contributor.authorHussain, Muhammad Mustafa
dc.contributor.authorSmith, Casey Eben
dc.contributor.authorBanerjee, Kaustav
dc.date.accessioned2015-08-04T06:21:02Z
dc.date.available2015-08-04T06:21:02Z
dc.date.issued2010
dc.identifier.citationDadgour, H. F., Hussain, M. M., Smith, C., & Banerjee, K. (2010). Design and analysis of compact ultra energy-efficient logic gates using laterally-actuated double-electrode NEMS. Proceedings of the 47th Design Automation Conference on - DAC ’10. doi:10.1145/1837274.1837498
dc.identifier.isbn9781450300025
dc.identifier.issn0738100X
dc.identifier.doi10.1145/1837274.1837498
dc.identifier.urihttp://hdl.handle.net/10754/564259
dc.description.abstractNano-Electro-Mechanical Switches (NEMS) are among the most promising emerging devices due to their near-zero subthreshold-leakage currents. This paper reports device fabrication and modeling, as well as novel logic gate design using "laterally-actuated double-electrode NEMS" structures. The new device structure has several advantages over existing NEMS architectures such as being immune to impact bouncing and release vibrations (unlike a vertically-actuated NEMS) and offer higher flexibility to implement compact logic gates (unlike a single-electrode NEMS). A comprehensive analytical framework is developed to model different properties of these devices by solving the Euler-Bernoulli's beam equation. The proposed model is validated using measurement data for the fabricated devices. It is shown that by ignoring the non-uniformity of the electrostatic force distribution, the existing models "underestimate" the actual value of Vpull-in and Vpull-out. Furthermore, novel energy efficient NEMS-based circuit topologies are introduced to implement compact inverter, NAND, NOR and XOR gates. For instance, the proposed XOR gate can be implemented by using only two NEMS devices compared to that of a static CMOS-based XOR gate that requires at least 10 transistors. © Copyright 2010 ACM.
dc.publisherAssociation for Computing Machinery (ACM)
dc.subjectEnergy-efficient electronics
dc.subjectLaterally-actuated NEMS
dc.subjectLogic design
dc.subjectNano-electro-mechanical switches
dc.subjectProcess variation
dc.subjectSteep-subthreshold switch
dc.titleDesign and analysis of compact ultra energy-efficient logic gates using laterally-actuated double-electrode NEMS
dc.typeConference Paper
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
dc.contributor.departmentElectrical Engineering Program
dc.contributor.departmentIntegrated Nanotechnology Lab
dc.contributor.departmentPhysical Science and Engineering (PSE) Division
dc.identifier.journalProceedings of the 47th Design Automation Conference on - DAC '10
dc.conference.date13 June 2010 through 18 June 2010
dc.conference.name47th Design Automation Conference, DAC '10
dc.conference.locationAnaheim, CA
dc.contributor.institutionDepartment of Electrical and Computer Engineering, University of California, Santa Barbara, United States
dc.contributor.institutionSEMATECH, Austin, TX, United States
kaust.personHussain, Muhammad Mustafa


This item appears in the following Collection(s)

Show simple item record