Wavy channel thin film transistor architecture for area efficient, high performance and low power displays
Sevilla, Galo T.
Ghoneim, Mohamed T.
Hussain, Aftab M.
Bahabry, Rabab R.
Syed, Ahad A.
Hussain, Muhammad Mustafa
KAUST DepartmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Electrical Engineering Program
Physical Sciences and Engineering (PSE) Division
Materials Science and Engineering Program
Integrated Nanotechnology Lab
Advanced Nanofabrication, Imaging and Characterization Core Lab
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AbstractWe demonstrate a new thin film transistor (TFT) architecture that allows expansion of the device width using continuous fin features - termed as wavy channel (WC) architecture. This architecture allows expansion of transistor width in a direction perpendicular to the substrate, thus not consuming extra chip area, achieving area efficiency. The devices have shown for a 13% increase in the device width resulting in a maximum 2.5× increase in 'ON' current value of the WCTFT, when compared to planar devices consuming the same chip area, while using atomic layer deposition based zinc oxide (ZnO) as the channel material. The WCTFT devices also maintain similar 'OFF' current value, ~100 pA, when compared to planar devices, thus not compromising on power consumption for performance which usually happens with larger width devices. This work offers an interesting opportunity to use WCTFTs as backplane circuitry for large-area high-resolution display applications. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
SponsorsThis work is supported under Competitive Research Grant Funding Program (CRG-1-2012-HUS-008) by KAUST Office of Competitive Research Funds (OCRF).