Low-voltage back-gated atmospheric pressure chemical vapor deposition based graphene-striped channel transistor with high-κ dielectric showing room-temperature mobility > 11 000 cm2/V·s
Type
ArticleKAUST Department
Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) DivisionElectrical Engineering Program
Integrated Nanotechnology Lab
Date
2013-06-20Online Publication Date
2013-06-20Print Publication Date
2013-07-23Permanent link to this record
http://hdl.handle.net/10754/562870
Metadata
Show full item recordAbstract
Utilization of graphene may help realize innovative low-power replacements for III-V materials based high electron mobility transistors while extending operational frequencies closer to the THz regime for superior wireless communications, imaging, and other novel applications. Device architectures explored to date suffer a fundamental performance roadblock due to lack of compatible deposition techniques for nanometer-scale dielectrics required to efficiently modulate graphene transconductance (gm) while maintaining low gate capacitance-voltage product (CgsVgs). Here we show integration of a scaled (10 nm) high-κ gate dielectric aluminum oxide (Al2O3) with an atmospheric pressure chemical vapor deposition (APCVD)-derived graphene channel composed of multiple 0.25 μm stripes to repeatedly realize room-temperature mobility of 11 000 cm 2/V·s or higher. This high performance is attributed to the APCVD graphene growth quality, excellent interfacial properties of the gate dielectric, conductivity enhancement in the graphene stripes due to low t ox/Wgraphene ratio, and scaled high-κ dielectric gate modulation of carrier density allowing full actuation of the device with only ±1 V applied bias. The superior drive current and conductance at Vdd = 1 V compared to other top-gated devices requiring undesirable seed (such as aluminum and poly vinyl alcohol)-assisted dielectric deposition, bottom gate devices requiring excessive gate voltage for actuation, or monolithic (nonstriped) channels suggest that this facile transistor structure provides critical insight toward future device design and process integration to maximize CVD-based graphene transistor performance. © 2013 American Chemical Society.Citation
Smith, C., Qaisi, R., Liu, Z., Yu, Q., & Hussain, M. M. (2013). Low-Voltage Back-Gated Atmospheric Pressure Chemical Vapor Deposition Based Graphene-Striped Channel Transistor with High-κ Dielectric Showing Room-Temperature Mobility > 11 000 cm2/V·s. ACS Nano, 7(7), 5818–5823. doi:10.1021/nn400796bPublisher
American Chemical Society (ACS)Journal
ACS NanoPubMed ID
23777434ae974a485f413a2113503eed53cd6c53
10.1021/nn400796b
Scopus Count
Related articles
- Coplanar-gate transparent graphene transistors and inverters on plastic.
- Authors: Kim BJ, Lee SK, Kang MS, Ahn JH, Cho JH
- Issue date: 2012 Oct 23
- The study of the effects of cooling conditions on high quality graphene growth by the APCVD method.
- Authors: Xiao K, Wu H, Lv H, Wu X, Qian H
- Issue date: 2013 Jun 21
- Current saturation in submicrometer graphene transistors with thin gate dielectric: experiment, simulation, and theory.
- Authors: Han SJ, Reddy D, Carpenter GD, Franklin AD, Jenkins KA
- Issue date: 2012 Jun 26
- High-kappa oxide nanoribbons as gate dielectrics for high mobility top-gated graphene transistors.
- Authors: Liao L, Bai J, Qu Y, Lin YC, Li Y, Huang Y, Duan X
- Issue date: 2010 Apr 13
- Synthesis and characterization of hexagonal boron nitride film as a dielectric layer for graphene devices.
- Authors: Kim KK, Hsu A, Jia X, Kim SM, Shi Y, Dresselhaus M, Palacios T, Kong J
- Issue date: 2012 Oct 23