Fabrication and characterization of high-mobility solution-based chalcogenide thin-film transistors
AuthorsMejia, Israel I.
Salas Villaseñor, Ana L.
Cha, Dong Kyu
Alshareef, Husam N.
Gnade, Bruce E.
Quevedo-López, Manuel Angel Quevedo
KAUST DepartmentCore Labs
Functional Nanomaterials and Devices Research Group
Imaging and Characterization Core Lab
Material Science and Engineering Program
Physical Science and Engineering (PSE) Division
Permanent link to this recordhttp://hdl.handle.net/10754/562575
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AbstractWe report device and material considerations for the fabrication of high-mobility thin-film transistors (TFTs) compatible with large-area and inexpensive processes. In particular, this paper reports photolithographically defined n-type TFTs (n-TFTs) based on cadmium sulfide (CdS) films deposited using solution-based techniques. The integration process consists of four mask levels with a maximum processing temperature of 100 °C. The TFT performance was analyzed in terms of the CdS semiconductor thickness and as a function of postdeposition annealing in a reducing ambient. The IonI off ratios are ∼107 with field-effect mobilities of ∼5.3 and ∼4.7cm2V̇s for Al and Au source-drain contacts, respectively, using 70 nm of CdS. Transmission electron microscopy and electron energy loss spectroscopy were used to analyze the CdS-metal interfaces. © 1963-2012 IEEE.
CitationMejia, I., Salas-Villasenor, A. L., Cha, D., Alshareef, H. N., Gnade, B. E., & Quevedo-Lopez, M. A. (2013). Fabrication and Characterization of High-Mobility Solution-Based Chalcogenide Thin-Film Transistors. IEEE Transactions on Electron Devices, 60(1), 327–332. doi:10.1109/ted.2012.2228200
SponsorsThis work was supported in part by the CONACyT, by the Air Force Office of Sponsored Research, and by the Army Research Laboratory. The review of this paper was arranged by Editor H.-S. Tae.