KAUST DepartmentElectrical Engineering Program
Integrated Nanotechnology Lab
Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Online Publication Date2012-09-10
Print Publication Date2012-10
Permanent link to this recordhttp://hdl.handle.net/10754/562324
MetadataShow full item record
AbstractHigh performance computation with longer battery lifetime is an essential component in our today's digital electronics oriented life. To achieve these goals, field effect transistors based complementary metal oxide semiconductor play the key role. One of the critical requirements of transistor structure and fabrication is efficient contact engineering. To catch up with high performance information processing, transistors are going through continuous scaling process. However, it also imposes new challenges to integrate good contact materials in a small area. This can be counterproductive as smaller area results in higher contact resistance thus reduced performance for the transistor itself. At the same time, discovery of new one or two-dimensional materials like nanowire, nanotube, or atomic crystal structure materials, introduces new set of challenges and opportunities. In this paper, we are reviewing them in a synchronized fashion: fundamentals of contact engineering, evolution into non-planar field effect transistors, opportunities and challenges with one and two-dimensional materials and a new opportunity of contact engineering from device architecture perspective. © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
CitationHussain, M., Fahad, H., & Qaisi, R. (2012). Contact engineering for nano-scale CMOS. Physica Status Solidi (a), 209(10), 1954–1959. doi:10.1002/pssa.201200343
SponsorsWe deeply appreciate the generous research grants provided by King Abdullah University of Science and Technology.
Journalphysica status solidi (a)