Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering
dc.contributor.author | Hussain, Muhammad Mustafa | |
dc.contributor.author | Smith, Casey Eben | |
dc.contributor.author | Harris, Harlan Rusty | |
dc.contributor.author | Young, Chadwin | |
dc.contributor.author | Tseng, Hsinghuang | |
dc.contributor.author | Jammy, Rajarao | |
dc.date.accessioned | 2015-08-02T09:11:46Z | |
dc.date.available | 2015-08-02T09:11:46Z | |
dc.date.issued | 2010-03 | |
dc.identifier.citation | Hussain, M. M., Smith, C. E., Harris, H. R., Young, C. D., Tseng, H.-H., & Jammy, R. (2010). Gate-First Integration of Tunable Work Function Metal Gates of Different Thicknesses Into High-$k$/Metal Gates CMOS FinFETs for Multi- $V_{\rm Th}$ Engineering. IEEE Transactions on Electron Devices, 57(3), 626–631. doi:10.1109/ted.2009.2039097 | |
dc.identifier.issn | 00189383 | |
dc.identifier.doi | 10.1109/TED.2009.2039097 | |
dc.identifier.uri | http://hdl.handle.net/10754/561454 | |
dc.description.abstract | Gate-first integration of tunable work function metal gates of different thicknesses (320 nm) into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages (VTh) for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering ∼ 40 mV/V), nearly symmetric VTh, low T inv(∼ 1.4 nm), and high Ion(∼780μAμm) for N/PMOS without any intentional strain enhancement. © 2006 IEEE. | |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | |
dc.subject | FinFET | |
dc.subject | Gate-first integration | |
dc.subject | High- k/metal gates stack | |
dc.subject | Tunable work function (TWF) | |
dc.title | Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering | |
dc.type | Article | |
dc.contributor.department | Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division | |
dc.contributor.department | Electrical Engineering Program | |
dc.contributor.department | Integrated Nanotechnology Lab | |
dc.contributor.department | Physical Science and Engineering (PSE) Division | |
dc.identifier.journal | IEEE Transactions on Electron Devices | |
dc.contributor.institution | SEMATECH, Inc., Austin, TX 78741, United States | |
dc.contributor.institution | Department of Electrical and Computer Engineering, Texas A and M University, College Station, TX 77843, United States | |
dc.contributor.institution | Texas State University, San Marcos, TX 78666, United States | |
kaust.person | Hussain, Muhammad Mustafa |
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Electrical Engineering Program
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Integrated Nanotechnology Lab
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Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
For more information visit: https://cemse.kaust.edu.sa/