Architectural optimizations for low-power K-best MIMO decoders
dc.contributor.author | Mondal, Sudip | |
dc.contributor.author | Eltawil, Ahmed M. | |
dc.contributor.author | Salama, Khaled N. | |
dc.date.accessioned | 2015-08-02T09:10:53Z | |
dc.date.available | 2015-08-02T09:10:53Z | |
dc.date.issued | 2009-09 | |
dc.identifier.citation | Mondal, S., Eltawil, A. M., & Salama, K. N. (2009). Architectural Optimizations for Low-Power $K$-Best MIMO Decoders. IEEE Transactions on Vehicular Technology, 58(7), 3145–3153. doi:10.1109/tvt.2009.2017548 | |
dc.identifier.issn | 00189545 | |
dc.identifier.doi | 10.1109/TVT.2009.2017548 | |
dc.identifier.uri | http://hdl.handle.net/10754/561423 | |
dc.description.abstract | Maximum-likelihood (ML) detection for higher order multiple-input-multiple-output (MIMO) systems faces a major challenge in computational complexity. This limits the practicality of these systems from an implementation point of view, particularly for mobile battery-operated devices. In this paper, we propose a modified approach for MIMO detection, which takes advantage of the quadratic-amplitude modulation (QAM) constellation structure to accelerate the detection procedure. This approach achieves low-power operation by extending the minimum number of paths and reducing the number of required computations for each path extension, which results in an order-of-magnitude reduction in computations in comparison with existing algorithms. This paper also describes the very-large-scale integration (VLSI) design of the low-power path metric computation unit. The approach is applied to a 4 × 4, 64-QAM MIMO detector system. Results show negligible performance degradation compared with conventional algorithms while reducing the complexity by more than 50%. © 2009 IEEE. | |
dc.description.sponsorship | Manuscript received January 29, 2009. First published March 16, 2009; current version published August 14, 2009. This work was supported in part by the Center for Automation Technologies and Systems under a block grant from the New York State Foundation for Science, Technology, and Innovation and Grant 2006-IJ-CX-K044 from the National Institute of Justice under the Department of Justice. The review of this paper was coordinated by Dr. H. H. Nguyen. | |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | |
dc.subject | K-best decoders | |
dc.subject | Low power | |
dc.subject | Multiple-input-multiple-output (MIMO) | |
dc.subject | Sphere decoders | |
dc.subject | Wireless | |
dc.title | Architectural optimizations for low-power K-best MIMO decoders | |
dc.type | Article | |
dc.contributor.department | Electrical Engineering Program | |
dc.contributor.department | Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division | |
dc.contributor.department | Sensors Lab | |
dc.identifier.journal | IEEE Transactions on Vehicular Technology | |
dc.contributor.institution | Cypress Semiconductors Corporation, San Jose, CA 95134, United States | |
dc.contributor.institution | Department of Electrical, Computers and Systems Engineering, Rensselaer Polytechnic Institute, Troy, NY 12180, United States | |
dc.contributor.institution | Department of Electrical Engineering and Computer Science, University of California, Irvine, CA 92697, United States | |
kaust.person | Salama, Khaled N. |
This item appears in the following Collection(s)
-
Articles
-
Electrical and Computer Engineering Program
For more information visit: https://cemse.kaust.edu.sa/ece -
Sensors Lab
For more information visit: https://cemse.kaust.edu.sa/sensors -
Computer, Electrical and Mathematical Science and Engineering (CEMSE) Division
For more information visit: https://cemse.kaust.edu.sa/