Omran, Hesham; Salama, Khaled N.(2015 IEEE 3rd International Conference on Smart Instrumentation, Measurement and Applications (ICSIMA), Institute of Electrical and Electronics Engineers (IEEE), 2016-09-05)[Conference Paper]
Hanna, Amir; Hussain, Aftab M.; Hussain, Aftab M.; Hussain, Aftab M.; Omran, Hesham; Alsharif, Sarah M.; Salama, Khaled N.; Hussain, Muhammad Mustafa(IEEE Transactions on Electron Devices, Institute of Electrical and Electronics Engineers (IEEE), 2016-02-23)[Article]
We report a wavy channel (WC) architecture thin-film transistor-based digital circuitry using ZnO as a channel material. The novel architecture allows for extending device width by integrating vertical finlike substrate corrugations giving rise to 50% larger device width, without occupying extra chip area. The enhancement in the output drive current is 100%, when compared with conventional planar architecture for devices occupying the same chip area. The current increase is attributed to both the extra device width and 50% enhancement in field-effect mobility due to electrostatic gating effects. Fabricated inverters show that WC inverters can achieve two times the peak-to-peak output voltage for the same input when compared with planar devices. In addition, WC inverters show 30% faster rise and fall times, and can operate up to around two times frequency of the planar inverters for the same peak-to-peak output voltage. WC NOR circuits have shown 70% higher peak-to-peak output voltage, over their planar counterparts, and WC pass transistor logic multiplexer circuit has shown more than five times faster high-to-low propagation delay compared with its planar counterpart at a similar peak-to-peak output voltage.
Zidan, Mohammed A.; Omran, Hesham; Salem, Ahmed Sultan; Fahmy, Hossam Aly Hassan; Salama, Khaled N.(IEEE Transactions on Nanotechnology, Institute of Electrical and Electronics Engineers (IEEE), 2015-01)[Article]
Leakage current is one of the main challenges facing high-density MOS-gated memristor arrays. In this study, we show that leakage current ruins the memory readout process for high-density arrays, and analyze the tradeoff between the array density and its power consumption. We propose a novel readout technique and its underlying circuitry, which is able to compensate for the transistor leakage-current effect in the high-density gated memristor array.
Omran, Hesham; Arsalan, Muhammad; Salama, Khaled N.(Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, Institute of Electrical and Electronics Engineers (IEEE), 2014-09)[Conference Paper]
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