Zidan, Mohammed A.; Fahmy, Hossam A.H.; Hussain, Muhammad Mustafa; Salama, Khaled N.(Microelectronics Journal, Elsevier BV, 2012-10-29)[Article]
In this paper, we investigate the read operation of memristor-based memories. We analyze the sneak paths problem and provide a noise margin metric to compare the various solutions proposed in the literature. We also analyze the power consumption associated with these solutions. Moreover, we study the effect of the aspect ratio of the memory array on the sneak paths. Finally, we introduce a new technique for solving the sneak paths problem by gating the memory cell using a three-terminal memistor device.
Mansingka, Abhinav S.; Zidan, Mohammed A.; Barakat, Mohamed L.; Radwan, Ahmed Gomaa; Salama, Khaled N.(Microelectronics Journal, Elsevier BV, 2014-06-18)[Article]
This paper introduces fully digital implementations of four di erent systems in the 3rd order jerk-equation based chaotic family
using the Euler approximation. The digitization approach enables controllable chaotic systems that reliably provide sinusoidal or
chaotic output based on a selection input. New systems are introduced, derived using logical and arithmetic operations between
two system implementations of different bus widths, with up to 100x higher maximum Lyapunov exponent than the original jerkequation
based chaotic systems. The resulting chaotic output is shown to pass the NIST sp. 800-22 statistical test suite for pseudorandom
number generators without post-processing by only eliminating the statistically defective bits. The systems are designed
in Verilog HDL and experimentally verified on a Xilinx Virtex 4 FPGA for a maximum throughput of 15.59 Gbits/s for the native
chaotic output and 8.77 Gbits/s for the resulting pseudo-random number generators.
Ghoneim, Mohamed T.; Zidan, Mohammed A.; Salama, Khaled N.; Hussain, Muhammad Mustafa(Microelectronics Journal, Elsevier BV, 2014-11)[Article]
The advantages associated with neuromorphic computation are rich areas of complex research. We address the fabrication challenge of building neuromorphic devices on structurally foldable platform with high integration density. We present a CMOS compatible fabrication process to demonstrate for the first time memristive devices fabricated on bulk monocrystalline silicon (100) which is next transformed into a flexible thin sheet of silicon fabric with all the pre-fabricated devices. This process preserves the ultra-high integration density advantage unachievable on other flexible substrates. In addition, the memristive devices are of the size of a motor neuron and the flexible/folded architectural form factor is critical to match brain cortex's folded pattern for ultra-compact design.
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