Zidan, Mohammed A.; Eltawil, Ahmed M.; Fahmy, Hossam A.H.; Kurdahi, Fadi; Salama, Khaled N.(IEEE Transactions on Nanotechnology, Institute of Electrical and Electronics Engineers (IEEE), 2014-01-31)[Article]
In this paper, we introduce for the first time, a closed-form solution for the memristor-based memory sneak paths without using any gating elements. The introduced technique fully eliminates the effect of sneak paths by reading the stored data using multiple access points and evaluating a simple addition/subtraction on the different readings. The new method requires fewer reading steps compared to previously reported techniques, and has a very small impact on the memory density. To verify the underlying theory, the proposed system is simulated using Synopsys HSPICE showing the ability to achieve a 100% sneak-path error-free memory. In addition, the effect of quantization bits on the system performance is studied.
In this paper, we propose an energy-efficient 13-bit capacitive sensor interface circuit. The
proposed design fully relies on successive approximation algorithm, which eliminates the
need for oversampling and digital decimation filtering, and thus low-power consumption is
achieved. The proposed architecture employs a charge amplifier stage to acheive parasitic
insensitive operation and fine absolute resolution. Moreover, the output code is not
affected by offset voltages or charge injection. The successive approximation algorithm is
implemented in the capacitance-domain using a coarse-fine programmable capacitor array,
which allows digitizing wide capacitance range in compact area. Analysis for the maximum
achievable resolution due to mismatch is provided. The proposed design is insensitive to
any reference voltage or current which translates to low temperature sensitivity. The operation
of a prototype fabricated in a standard CMOS technology is experimentally verified
using both on-chip and off-chip capacitive sensors. Compared to similar prior work, the
fabricated prototype achieves and excellent energy efficiency of 34 pJ/step.
Mansingka, Abhinav S.; Zidan, Mohammed A.; Barakat, Mohamed L.; Radwan, Ahmed Gomaa; Salama, Khaled N.(Microelectronics Journal, Elsevier BV, 2013-07-20)[Article]
This paper introduces fully digital implementations of four di erent systems in the 3rd order jerk-equation based chaotic family
using the Euler approximation. The digitization approach enables controllable chaotic systems that reliably provide sinusoidal or
chaotic output based on a selection input. New systems are introduced, derived using logical and arithmetic operations between
two system implementations of different bus widths, with up to 100x higher maximum Lyapunov exponent than the original jerkequation
based chaotic systems. The resulting chaotic output is shown to pass the NIST sp. 800-22 statistical test suite for pseudorandom
number generators without post-processing by only eliminating the statistically defective bits. The systems are designed
in Verilog HDL and experimentally verified on a Xilinx Virtex 4 FPGA for a maximum throughput of 15.59 Gbits/s for the native
chaotic output and 8.77 Gbits/s for the resulting pseudo-random number generators.
Elshurafa, Amro M.; Salama, Khaled N.(Micro & Nano Letters, Institution of Engineering and Technology (IET), 2012-07-25)[Article]
A RF MEMS capacitor with an interwoven structure is designed, fabricated in the PolyMUMPS process and tested in an effort to address fabrication challenges usually faced in MEMS processes. The interwoven structure was found to offer several advantages over the typical MEMS parallel-plate design including eliminating the warping caused by residual stress, eliminating the need for etching holes, suppressing stiction, reducing parasitics and providing differential capability. The quality factor of the proposed capacitor was higher than five throughout a 2–10 GHz range and the resonant frequency was in excess of 20 GHz.
We show that graphene-percolated polymer composites exhibit fractional capacitance response in the frequency range of 50 kHz–2 MHz. In addition, it is shown that by varying the loading of graphene within the matrix from 2.5% to 12%, the phase can be controllably tuned from −67° to −31°, respectively. The electrostatic fractional capacitors proposed herein are easy to fabricate and offer integration capability on electronic printed circuit boards.
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