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dc.contributor.authorFan, Yiqiang
dc.contributor.authorCarreno, Armando Arpys Arevalo
dc.contributor.authorLi, Huawei
dc.contributor.authorFoulds, Ian G.
dc.date.accessioned2015-06-14T13:14:57Z
dc.date.available2015-06-14T13:14:57Z
dc.date.issued2014-05-20
dc.identifier.citationLow-cost silicon wafer dicing using a craft cutter 2014, 21 (7):1411 Microsystem Technologies
dc.identifier.issn0946-7076
dc.identifier.issn1432-1858
dc.identifier.doi10.1007/s00542-014-2198-4
dc.identifier.urihttp://hdl.handle.net/10754/556898
dc.description.abstractThis paper reports a low-cost silicon wafer dicing technique using a commercial craft cutter. The 4-inch silicon wafers were scribed using a crafter cutter with a mounted diamond blade. The pre-programmed automated process can reach a minimum die feature of 3 mm by 3 mm. We performed this scribing process on the top polished surface of a silicon wafer; we also created a scribing method for the back-unpolished surface in order to protect the structures on the wafer during scribing. Compared with other wafer dicing methods, our proposed dicing technique is extremely low cost (lower than $1,000), and suitable for silicon wafer dicing in microelectromechanical or microfluidic fields, which usually have a relatively large die dimension. The proposed dicing technique is also usable for dicing multiple project wafers, a process where dies of different dimensions are diced on the same wafer.
dc.publisherSpringer Science + Business Media
dc.relation.urlhttp://link.springer.com/10.1007/s00542-014-2198-4
dc.rightsArchived with thanks to Microsystem Technologies. © The Author(s) 2014. This article is published with open access at Springerlink.com
dc.titleLow-cost silicon wafer dicing using a craft cutter
dc.typeArticle
dc.contributor.departmentElectromechanical Microsystems & Polymer Integration Research Lab (EMPIRe)
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
dc.identifier.journalMicrosystem Technologies
dc.eprint.versionPublisher's Version/PDF
dc.contributor.institutionSchool of Engineering, Okanagan Campus, The University of British Columbia, Vancouver, Canada
kaust.personFan, Yiqiang
kaust.personLi, Huawei
kaust.personCarreno, Armando Arpys Arevalo
refterms.dateFOA2018-06-14T07:10:08Z


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