Impact of Gate Dielectric in Carrier Mobility in Low Temperature Chalcogenide Thin Film Transistors for Flexible Electronics
Type
ArticleAuthors
Salas-Villasenor, A. L.Mejia, I.
Hovarth, J.
Alshareef, Husam N.

Cha, Dong Kyu
Ramirez-Bon, R.
Gnade, B. E.
Quevedo-Lopez, M. A.
KAUST Department
Functional Nanomaterials and Devices Research GroupImaging and Characterization Core Lab
Material Science and Engineering Program
Physical Science and Engineering (PSE) Division
Date
2010-07-12Online Publication Date
2010-07-12Print Publication Date
2010Permanent link to this record
http://hdl.handle.net/10754/555786
Metadata
Show full item recordAbstract
Cadmium sulfide thin film transistors were demonstrated as the n-type device for use in flexible electronics. CdS thin films were deposited by chemical bath deposition (70° C) on either 100 nm HfO2 or SiO2 as the gate dielectrics. Common gate transistors with channel lengths of 40-100 μm were fabricated with source and drain aluminum top contacts defined using a shadow mask process. No thermal annealing was performed throughout the device process. X-ray diffraction results clearly show the hexagonal crystalline phase of CdS. The electrical performance of HfO 2 /CdS -based thin film transistors shows a field effect mobility and threshold voltage of 25 cm2 V-1 s-1 and 2 V, respectively. Improvement in carrier mobility is associated with better nucleation and growth of CdS films deposited on HfO2. © 2010 The Electrochemical Society.Citation
Impact of Gate Dielectric in Carrier Mobility in Low Temperature Chalcogenide Thin Film Transistors for Flexible Electronics 2010, 13 (9):H313 Electrochemical and Solid-State LettersPublisher
The Electrochemical SocietyAdditional Links
http://esl.ecsdl.org/cgi/doi/10.1149/1.3456551ae974a485f413a2113503eed53cd6c53
10.1149/1.3456551