Impact of Gate Dielectric in Carrier Mobility in Low Temperature Chalcogenide Thin Film Transistors for Flexible Electronics
AuthorsSalas-Villasenor, A. L.
Alshareef, Husam N.
Cha, Dong Kyu
Gnade, B. E.
Quevedo-Lopez, M. A.
KAUST DepartmentFunctional Nanomaterials and Devices Research Group
Imaging and Characterization Core Lab
Material Science and Engineering Program
Physical Science and Engineering (PSE) Division
Online Publication Date2010-07-12
Print Publication Date2010
Permanent link to this recordhttp://hdl.handle.net/10754/555786
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AbstractCadmium sulfide thin film transistors were demonstrated as the n-type device for use in flexible electronics. CdS thin films were deposited by chemical bath deposition (70° C) on either 100 nm HfO2 or SiO2 as the gate dielectrics. Common gate transistors with channel lengths of 40-100 μm were fabricated with source and drain aluminum top contacts defined using a shadow mask process. No thermal annealing was performed throughout the device process. X-ray diffraction results clearly show the hexagonal crystalline phase of CdS. The electrical performance of HfO 2 /CdS -based thin film transistors shows a field effect mobility and threshold voltage of 25 cm2 V-1 s-1 and 2 V, respectively. Improvement in carrier mobility is associated with better nucleation and growth of CdS films deposited on HfO2. © 2010 The Electrochemical Society.
CitationImpact of Gate Dielectric in Carrier Mobility in Low Temperature Chalcogenide Thin Film Transistors for Flexible Electronics 2010, 13 (9):H313 Electrochemical and Solid-State Letters
PublisherThe Electrochemical Society