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dc.contributor.authorMansingka, Abhinav S.
dc.contributor.authorZidan, Mohammed A.
dc.contributor.authorBarakat, Mohamed L.
dc.contributor.authorRadwan, Ahmed Gomaa
dc.contributor.authorSalama, Khaled N.
dc.date.accessioned2014-06-18T18:31:28Z
dc.date.available2014-06-18T18:31:28Z
dc.date.issued2013-07-20
dc.identifier.citationMansingka AS, Affan Zidan M, Barakat ML, Radwan AG, Salama KN (2013) Fully digital jerk-based chaotic oscillators for high throughput pseudo-random number generators up to 8.77Gbits/s. Microelectronics Journal 44: 744-752. doi:10.1016/j.mejo.2013.06.007.
dc.identifier.issn00262692
dc.identifier.doi10.1016/j.mejo.2013.06.007
dc.identifier.urihttp://hdl.handle.net/10754/321913
dc.description.abstractThis paper introduces fully digital implementations of four different systems in the 3rd order jerk-equation based chaotic family using the Euler approximation. The digitization approach enables controllable chaotic systems that reliably provide sinusoidal or chaotic output based on a selection input. New systems are introduced, derived using logical and arithmetic operations between two system implementations of different bus widths, with up to 100x higher maximum Lyapunov exponent than the original jerkequation based chaotic systems. The resulting chaotic output is shown to pass the NIST sp. 800-22 statistical test suite for pseudorandom number generators without post-processing by only eliminating the statistically defective bits. The systems are designed in Verilog HDL and experimentally verified on a Xilinx Virtex 4 FPGA for a maximum throughput of 15.59 Gbits/s for the native chaotic output and 8.77 Gbits/s for the resulting pseudo-random number generators
dc.language.isoen
dc.publisherElsevier BV
dc.relation.urlhttp://linkinghub.elsevier.com/retrieve/pii/S0026269213001444
dc.rightsArchived with thanks to Microelectronics Journal
dc.subjectRNG
dc.subjectchaos
dc.subjectNIST
dc.titleFully digital jerk-based chaotic oscillators for high throughput pseudo-random number generators up to 8.77Gbits/s
dc.typeArticle
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
dc.contributor.departmentElectrical Engineering Program
dc.contributor.departmentPhysical Science and Engineering (PSE) Division
dc.contributor.departmentSensors Lab
dc.identifier.journalMicroelectronics Journal
dc.eprint.versionPre-print
dc.contributor.institutionEngineering Mathematics Department, Faculty of Engineering, Cairo University, Giza, Egypt
dc.contributor.affiliationKing Abdullah University of Science and Technology (KAUST)
kaust.personMansingka, Abhinav S.
kaust.personZidan, Mohammed A.
kaust.personBarakat, Mohamed L.
kaust.personSalama, Khaled N.
refterms.dateFOA2018-06-13T14:27:23Z
dc.date.published-online2013-07-20
dc.date.published-print2013-09


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