Are Nanotube Architectures More Advantageous Than Nanowire Architectures For Field Effect Transistors?
KAUST DepartmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Integrated Nanotechnology Lab
MetadataShow full item record
AbstractDecade long research in 1D nanowire field effect transistors (FET) shows although it has ultra-low off-state leakage current and a single device uses a very small area, its drive current generation per device is extremely low. Thus it requires arrays of nanowires to be integrated together to achieve appreciable amount of current necessary for high performance computation causing an area penalty and compromised functionality. Here we show that a FET with a nanotube architecture and core-shell gate stacks is capable of achieving the desirable leakage characteristics of the nanowire FET while generating a much larger drive current with area efficiency. The core-shell gate stacks of silicon nanotube FETs tighten the electrostatic control and enable volume inversion mode operation leading to improved short channel behavior and enhanced performance. Our comparative study is based on semi-classical transport models with quantum confinement effects which offers new opportunity for future generation high performance computation.
CitationFahad HM, Hussain MM (2012) Are Nanotube Architectures More Advantageous Than Nanowire Architectures For Field Effect Transistors- Sci Rep 2. doi:10.1038/srep00475.
PublisherNature Publishing Group
PubMed Central IDPMC3384075
- Enhanced channel modulation in dual-gated silicon nanowire transistors.
- Authors: Koo SM, Li Q, Edelstein MD, Richter CA, Vogel EM
- Issue date: 2005 Dec
- Combining axial and radial nanowire heterostructures: radial Esaki diodes and tunnel field-effect transistors.
- Authors: Dey AW, Svensson J, Ek M, Lind E, Thelander C, Wernersson LE
- Issue date: 2013
- Silicon p-FETs from ultrahigh density nanowire arrays.
- Authors: Wang D, Sheriff BA, Heath JR
- Issue date: 2006 Jun
- Hybrid Si nanowire/amorphous silicon FETs for large-area image sensor arrays.
- Authors: Wong WS, Raychaudhuri S, Lujan R, Sambandan S, Street RA
- Issue date: 2011 Jun 8
- Fabrication of suspended silicon nanowire arrays.
- Authors: Lee KN, Jung SW, Shin KS, Kim WH, Lee MH, Seong WK
- Issue date: 2008 May