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dc.contributor.advisorKeyes, David E.
dc.contributor.authorIbrahim, Mohamad A.
dc.date.accessioned2013-06-03T18:37:33Z
dc.date.available2013-06-03T18:37:33Z
dc.date.issued2013-05
dc.identifier.doi10.25781/KAUST-2X2DI
dc.identifier.urihttp://hdl.handle.net/10754/293352
dc.description.abstractThis thesis reports original work on hardware realization of symmetric video encryption using chaos-based continuous systems as pseudo-random number generators. The thesis also presents some of the serious degradations caused by digitally implementing chaotic systems. Subsequently, some techniques to eliminate such defects, including the ultimately adopted scheme are listed and explained in detail. Moreover, the thesis describes original work on the design of an encryption system to encrypt MPEG-2 video streams. Information about the MPEG-2 standard that fits this design context is presented. Then, the security of the proposed system is exhaustively analyzed and the performance is compared with other reported systems, showing superiority in performance and security. The thesis focuses more on the hardware and the circuit aspect of the system’s design. The system is realized on Xilinx Vetrix-4 FPGA with hardware parameters and throughput performance surpassing conventional encryption systems.
dc.language.isoen
dc.subjectMPEG2
dc.subjectEncryption
dc.subjectVideo
dc.subjectSecurity
dc.subjecthardware
dc.titleHardware Realization of Chaos-based Symmetric Video Encryption
dc.typeThesis
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
thesis.degree.grantorKing Abdullah University of Science and Technology
dc.contributor.committeememberAl-Naffouri, Tareq Y.
dc.contributor.committeememberAlouini, Mohamed-Slim
dc.contributor.committeememberSalama, Khaled N.
thesis.degree.disciplineComputer Science
thesis.degree.nameMaster of Science
refterms.dateFOA2014-05-11T00:00:00Z


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