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Random_Number_Generation_Based_on_Digital_Differential_Chaos (1).pdf
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Type
Conference PaperKAUST Department
Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) DivisionElectrical Engineering Program
Physical Science and Engineering (PSE) Division
Sensors Lab
Date
2011-09-28Online Publication Date
2011-09-28Print Publication Date
2011-08Permanent link to this record
http://hdl.handle.net/10754/236232
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In this paper, we present a fully digital differential chaos based random number generator. The output of the digital circuit is proved to be chaotic by calculating the output time series maximum Lyapunov exponent. We introduce a new post processing technique to improve the distribution and statistical properties of the generated data. The post-processed output passes the NIST Sp. 800-22 statistical tests. The system is written in Verilog VHDL and realized on Xilinx Virtex® FPGA. The generator can fit into a very small area and have a maximum throughput of 2.1 Gb/s.Citation
Zidan MA, Radwan AG, Salama KN (2011) Random number generation based on digital differential chaos. 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS). doi:10.1109/MWSCAS.2011.6026266.Conference/Event name
54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011ae974a485f413a2113503eed53cd6c53
10.1109/MWSCAS.2011.6026266