Design and analysis of 2T-2M Ternary content addressable memories

Handle URI:
http://hdl.handle.net/10754/626785
Title:
Design and analysis of 2T-2M Ternary content addressable memories
Authors:
Bahloul, M. A.; Fouda, M. E.; Naous, Rawan ( 0000-0001-6129-7926 ) ; Zidan, Mohammed A. ( 0000-0003-3843-814X ) ; Eltawil, A. M.; Kurdahi, F.; Salama, Khaled N. ( 0000-0001-7742-1282 )
Abstract:
Associate and approximate computing using resistive memory based Ternary Content Addressable Memory is becoming widely used. In this paper, a simplified model based analysis of a 2T2M-Ternary Content Addressable Memory using memristors is introduced. A comprehensive study is presented taking into consideration different circuit parameters and parasitic effects. Parameters such as the memristor Rh/Rl ratio, transistor technology, operating frequency, and memory width are taken into consideration. The proposed model is verified with SPICE showing a high degree of matching between theory and simulation. The utility of the model is established using a design example.
KAUST Department:
Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division; Electrical Engineering Program; Physical Sciences and Engineering (PSE) Division
Citation:
Bahloul MA, Fouda ME, Naous R, Zidan MA, Eltawil AM, et al. (2017) Design and analysis of 2T-2M Ternary content addressable memories. 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS). Available: http://dx.doi.org/10.1109/mwscas.2017.8053201.
Publisher:
IEEE
Journal:
2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)
Conference/Event name:
60th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2017
Issue Date:
24-Oct-2017
DOI:
10.1109/mwscas.2017.8053201
Type:
Conference Paper
Additional Links:
http://ieeexplore.ieee.org/document/8053201/
Appears in Collections:
Conference Papers; Physical Sciences and Engineering (PSE) Division; Electrical Engineering Program; Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division

Full metadata record

DC FieldValue Language
dc.contributor.authorBahloul, M. A.en
dc.contributor.authorFouda, M. E.en
dc.contributor.authorNaous, Rawanen
dc.contributor.authorZidan, Mohammed A.en
dc.contributor.authorEltawil, A. M.en
dc.contributor.authorKurdahi, F.en
dc.contributor.authorSalama, Khaled N.en
dc.date.accessioned2018-01-15T06:35:09Z-
dc.date.available2018-01-15T06:35:09Z-
dc.date.issued2017-10-24en
dc.identifier.citationBahloul MA, Fouda ME, Naous R, Zidan MA, Eltawil AM, et al. (2017) Design and analysis of 2T-2M Ternary content addressable memories. 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS). Available: http://dx.doi.org/10.1109/mwscas.2017.8053201.en
dc.identifier.doi10.1109/mwscas.2017.8053201en
dc.identifier.urihttp://hdl.handle.net/10754/626785-
dc.description.abstractAssociate and approximate computing using resistive memory based Ternary Content Addressable Memory is becoming widely used. In this paper, a simplified model based analysis of a 2T2M-Ternary Content Addressable Memory using memristors is introduced. A comprehensive study is presented taking into consideration different circuit parameters and parasitic effects. Parameters such as the memristor Rh/Rl ratio, transistor technology, operating frequency, and memory width are taken into consideration. The proposed model is verified with SPICE showing a high degree of matching between theory and simulation. The utility of the model is established using a design example.en
dc.publisherIEEEen
dc.relation.urlhttp://ieeexplore.ieee.org/document/8053201/en
dc.subjectMemristoren
dc.subjectTernary Content Addressable Memory (MTCAM)en
dc.subject2T2Men
dc.subjectDesignen
dc.subjectAnalysisen
dc.subjectMathematical modelen
dc.titleDesign and analysis of 2T-2M Ternary content addressable memoriesen
dc.typeConference Paperen
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Divisionen
dc.contributor.departmentElectrical Engineering Programen
dc.contributor.departmentPhysical Sciences and Engineering (PSE) Divisionen
dc.identifier.journal2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)en
dc.conference.date2017-08-06 to 2017-08-09en
dc.conference.name60th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2017en
dc.conference.locationBoston, MA, USAen
dc.contributor.institutionElectrical Engineering and Computer Science Dept., University of California-Irvine, CA, 92697-2625, USAen
kaust.authorBahloul, M. A.en
kaust.authorNaous, Rawanen
kaust.authorZidan, Mohammed A.en
kaust.authorSalama, Khaled N.en
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