Inverter-based successive approximation capacitance-to-digital converter

Handle URI:
http://hdl.handle.net/10754/624971
Title:
Inverter-based successive approximation capacitance-to-digital converter
Authors:
Omran, Hesham ( 0000-0002-0117-7364 ) ; Alhoshany, Abdulaziz; Salama, Khaled N. ( 0000-0001-7742-1282 )
Assignee:
King Abdullah University Of Science And Technology
Abstract:
An energy-efficient capacitance-to-digital converter (CDC) is provided that utilizes a capacitance-domain successive approximation (SAR) technique. Unlike SAR analog- to-digital converters (ADCs), analysis shows that for SAR CDCs, the comparator offset voltage will result in signal-dependent and parasitic-dependent conversion errors, which necessitates an op-amp-based implementation. The inverter-based SAR CDC contemplated herein provides robust, energy-efficient, and fast operation. The inverter- based SAR CDC may include a hybrid coarse-fine programmable capacitor array. The design of example embodiments is insensitive to analog references, and thus achieves very low temperature sensitivity without the need for calibration. Moreover, this design achieves improved energy efficiency.
KAUST Department:
Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division
Issue Date:
23-Mar-2017
Submitted date:
2015-09-17
Type:
Patent
Application Number:
WO 2017046782 A1
Patent Status:
Published Application
Additional Links:
http://www.google.com/patents/WO2017046782A1; http://worldwide.espacenet.com/publicationDetails/biblio?CC=WO&NR=2017046782A1&KC=A1&FT=D
Appears in Collections:
Patents

Full metadata record

DC FieldValue Language
dc.contributor.authorOmran, Heshamen
dc.contributor.authorAlhoshany, Abdulazizen
dc.contributor.authorSalama, Khaled N.en
dc.date.accessioned2017-06-13T06:47:11Z-
dc.date.available2017-06-13T06:47:11Z-
dc.date.issued2017-03-23-
dc.date.submitted2015-09-17-
dc.identifier.urihttp://hdl.handle.net/10754/624971-
dc.description.abstractAn energy-efficient capacitance-to-digital converter (CDC) is provided that utilizes a capacitance-domain successive approximation (SAR) technique. Unlike SAR analog- to-digital converters (ADCs), analysis shows that for SAR CDCs, the comparator offset voltage will result in signal-dependent and parasitic-dependent conversion errors, which necessitates an op-amp-based implementation. The inverter-based SAR CDC contemplated herein provides robust, energy-efficient, and fast operation. The inverter- based SAR CDC may include a hybrid coarse-fine programmable capacitor array. The design of example embodiments is insensitive to analog references, and thus achieves very low temperature sensitivity without the need for calibration. Moreover, this design achieves improved energy efficiency.en
dc.relation.urlhttp://www.google.com/patents/WO2017046782A1en
dc.relation.urlhttp://worldwide.espacenet.com/publicationDetails/biblio?CC=WO&NR=2017046782A1&KC=A1&FT=Den
dc.titleInverter-based successive approximation capacitance-to-digital converteren
dc.typePatenten
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Divisionen
dc.description.statusPublished Applicationen
dc.contributor.assigneeKing Abdullah University Of Science And Technologyen
dc.description.countryWorld Intellectual Property Organization (WIPO)en
dc.identifier.applicationnumberWO 2017046782 A1en
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