Unstructured Computational Aerodynamics on Many Integrated Core Architecture

Handle URI:
http://hdl.handle.net/10754/613013
Title:
Unstructured Computational Aerodynamics on Many Integrated Core Architecture
Authors:
Al Farhan, Mohammed A. ( 0000-0002-4988-4674 ) ; Kaushik, Dinesh K.; Keyes, David E. ( 0000-0002-4052-7224 )
Abstract:
Shared memory parallelization of the flux kernel of PETSc-FUN3D, an unstructured tetrahedral mesh Euler flow code previously studied for distributed memory and multi-core shared memory, is evaluated on up to 61 cores per node and up to 4 threads per core. We explore several thread-level optimizations to improve flux kernel performance on the state-of-the-art many integrated core (MIC) Intel processor Xeon Phi “Knights Corner,” with a focus on strong thread scaling. While the linear algebraic kernel is bottlenecked by memory bandwidth for even modest numbers of cores sharing a common memory, the flux kernel, which arises in the control volume discretization of the conservation law residuals and in the formation of the preconditioner for the Jacobian by finite-differencing the conservation law residuals, is compute-intensive and is known to exploit effectively contemporary multi-core hardware. We extend study of the performance of the flux kernel to the Xeon Phi in three thread affinity modes, namely scatter, compact, and balanced, in both offload and native mode, with and without various code optimizations to improve alignment and reduce cache coherency penalties. Relative to baseline “out-of-the-box” optimized compilation, code restructuring optimizations provide about 3.8x speedup using the offload mode and about 5x speedup using the native mode. Even with these gains for the flux kernel, with respect to execution time the MIC simply achieves par with optimized compilation on a contemporary multi-core Intel CPU, the 16-core Sandy Bridge E5 2670. Nevertheless, the optimizations employed to reduce the data motion and cache coherency protocol penalties of the MIC are expected to be of value for CFD and many other unstructured applications as many-core architecture evolves. We explore large-scale distributed-shared memory performance on the Cray XC40 supercomputer, to demonstrate that optimizations employed on Phi hybridize to this context, where each of thousands of nodes are comprised of two sockets of Intel Xeon Haswell CPUs with 32 cores per node.
KAUST Department:
Extreme Computing Research Center
Citation:
Unstructured Computational Aerodynamics on Many Integrated Core Architecture 2016 Parallel Computing
Publisher:
Elsevier BV
Journal:
Parallel Computing
Issue Date:
8-Jun-2016
DOI:
10.1016/j.parco.2016.06.001
Type:
Article
ISSN:
01678191
Sponsors:
The authors are very appreciative of collaborations with Intel Research Laboratories, the Extreme Computing Research Center at KAUST, and Professor Rio Yokota of the Tokyo Institute of Technology. Support in the form of computing resources was provided by the KAUST Supercomputing Laboratory, and KAUST Information Technology Research Division.
Additional Links:
http://linkinghub.elsevier.com/retrieve/pii/S0167819116300564
Appears in Collections:
Articles

Full metadata record

DC FieldValue Language
dc.contributor.authorAl Farhan, Mohammed A.en
dc.contributor.authorKaushik, Dinesh K.en
dc.contributor.authorKeyes, David E.en
dc.date.accessioned2016-06-14T09:16:58Z-
dc.date.available2016-06-14T09:16:58Z-
dc.date.issued2016-06-08-
dc.identifier.citationUnstructured Computational Aerodynamics on Many Integrated Core Architecture 2016 Parallel Computingen
dc.identifier.issn01678191-
dc.identifier.doi10.1016/j.parco.2016.06.001-
dc.identifier.urihttp://hdl.handle.net/10754/613013-
dc.description.abstractShared memory parallelization of the flux kernel of PETSc-FUN3D, an unstructured tetrahedral mesh Euler flow code previously studied for distributed memory and multi-core shared memory, is evaluated on up to 61 cores per node and up to 4 threads per core. We explore several thread-level optimizations to improve flux kernel performance on the state-of-the-art many integrated core (MIC) Intel processor Xeon Phi “Knights Corner,” with a focus on strong thread scaling. While the linear algebraic kernel is bottlenecked by memory bandwidth for even modest numbers of cores sharing a common memory, the flux kernel, which arises in the control volume discretization of the conservation law residuals and in the formation of the preconditioner for the Jacobian by finite-differencing the conservation law residuals, is compute-intensive and is known to exploit effectively contemporary multi-core hardware. We extend study of the performance of the flux kernel to the Xeon Phi in three thread affinity modes, namely scatter, compact, and balanced, in both offload and native mode, with and without various code optimizations to improve alignment and reduce cache coherency penalties. Relative to baseline “out-of-the-box” optimized compilation, code restructuring optimizations provide about 3.8x speedup using the offload mode and about 5x speedup using the native mode. Even with these gains for the flux kernel, with respect to execution time the MIC simply achieves par with optimized compilation on a contemporary multi-core Intel CPU, the 16-core Sandy Bridge E5 2670. Nevertheless, the optimizations employed to reduce the data motion and cache coherency protocol penalties of the MIC are expected to be of value for CFD and many other unstructured applications as many-core architecture evolves. We explore large-scale distributed-shared memory performance on the Cray XC40 supercomputer, to demonstrate that optimizations employed on Phi hybridize to this context, where each of thousands of nodes are comprised of two sockets of Intel Xeon Haswell CPUs with 32 cores per node.en
dc.description.sponsorshipThe authors are very appreciative of collaborations with Intel Research Laboratories, the Extreme Computing Research Center at KAUST, and Professor Rio Yokota of the Tokyo Institute of Technology. Support in the form of computing resources was provided by the KAUST Supercomputing Laboratory, and KAUST Information Technology Research Division.en
dc.language.isoenen
dc.publisherElsevier BVen
dc.relation.urlhttp://linkinghub.elsevier.com/retrieve/pii/S0167819116300564en
dc.rightsNOTICE: this is the author’s version of a work that was accepted for publication in Parallel Computing. Changes resulting from the publishing process, such as peer review, editing, corrections, structural formatting, and other quality control mechanisms may not be reflected in this document. Changes may have been made to this work since it was submitted for publication. A definitive version was subsequently published in Parallel Computing, 8 June 2016. DOI: 10.1016/j.parco.2016.06.001en
dc.subjectIntel Xeon Phi coprocessoren
dc.subjectNative modeen
dc.subjectOffload modeen
dc.subjectPETSc-FUN3Den
dc.subjectThread affinityen
dc.subjectUnstructured meshesen
dc.titleUnstructured Computational Aerodynamics on Many Integrated Core Architectureen
dc.typeArticleen
dc.contributor.departmentExtreme Computing Research Centeren
dc.identifier.journalParallel Computingen
dc.eprint.versionPost-printen
dc.contributor.institutionQatar Environment and Energy Research Institute, Qatar Foundation, PO Box 5825, Doha, Qataren
dc.contributor.affiliationKing Abdullah University of Science and Technology (KAUST)en
kaust.authorAl Farhan, Mohammed A.en
kaust.authorKeyes, David E.en
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