Handle URI:
http://hdl.handle.net/10754/599557
Title:
Scalable Resolution Display Walls
Authors:
Leigh, Jason; Johnson, Andrew; Renambot, Luc; Peterka, Tom; Jeong, Byungil; Sandin, Daniel J.; Talandis, Jonas; Jagodic, Ratko; Nam, Sungwon; Hur, Hyejung; Sun, Yiwen
Abstract:
This article will describe the progress since 2000 on research and development in 2-D and 3-D scalable resolution display walls that are built from tiling individual lower resolution flat panel displays. The article will describe approaches and trends in display hardware construction, middleware architecture, and user-interaction design. The article will also highlight examples of use cases and the benefits the technology has brought to their respective disciplines. © 1963-2012 IEEE.
Citation:
Leigh J, Johnson A, Renambot L, Peterka T, Jeong B, et al. (2013) Scalable Resolution Display Walls. Proc IEEE 101: 115–129. Available: http://dx.doi.org/10.1109/JPROC.2012.2191609.
Publisher:
Institute of Electrical and Electronics Engineers (IEEE)
Journal:
Proceedings of the IEEE
KAUST Grant Number:
US-2008-107/SA-C0064
Issue Date:
Jan-2013
DOI:
10.1109/JPROC.2012.2191609
Type:
Article
ISSN:
0018-9219; 1558-2256
Sponsors:
This work was supported in part by the National Science Foundation under Awards CNS-0935919 and 0959053, and by the King Abdullah University of Science and Technology (KAUST) under Award US-2008-107/SA-C0064. Work at the Center for Nanoscale Materials was supported by the U.S. Department of Energy, Office of Science, Office of Basic Energy Sciences, under Contract DE-AC02-06CH11357.
Appears in Collections:
Publications Acknowledging KAUST Support

Full metadata record

DC FieldValue Language
dc.contributor.authorLeigh, Jasonen
dc.contributor.authorJohnson, Andrewen
dc.contributor.authorRenambot, Lucen
dc.contributor.authorPeterka, Tomen
dc.contributor.authorJeong, Byungilen
dc.contributor.authorSandin, Daniel J.en
dc.contributor.authorTalandis, Jonasen
dc.contributor.authorJagodic, Ratkoen
dc.contributor.authorNam, Sungwonen
dc.contributor.authorHur, Hyejungen
dc.contributor.authorSun, Yiwenen
dc.date.accessioned2016-02-28T05:53:19Zen
dc.date.available2016-02-28T05:53:19Zen
dc.date.issued2013-01en
dc.identifier.citationLeigh J, Johnson A, Renambot L, Peterka T, Jeong B, et al. (2013) Scalable Resolution Display Walls. Proc IEEE 101: 115–129. Available: http://dx.doi.org/10.1109/JPROC.2012.2191609.en
dc.identifier.issn0018-9219en
dc.identifier.issn1558-2256en
dc.identifier.doi10.1109/JPROC.2012.2191609en
dc.identifier.urihttp://hdl.handle.net/10754/599557en
dc.description.abstractThis article will describe the progress since 2000 on research and development in 2-D and 3-D scalable resolution display walls that are built from tiling individual lower resolution flat panel displays. The article will describe approaches and trends in display hardware construction, middleware architecture, and user-interaction design. The article will also highlight examples of use cases and the benefits the technology has brought to their respective disciplines. © 1963-2012 IEEE.en
dc.description.sponsorshipThis work was supported in part by the National Science Foundation under Awards CNS-0935919 and 0959053, and by the King Abdullah University of Science and Technology (KAUST) under Award US-2008-107/SA-C0064. Work at the Center for Nanoscale Materials was supported by the U.S. Department of Energy, Office of Science, Office of Basic Energy Sciences, under Contract DE-AC02-06CH11357.en
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.subjectComputer graphicsen
dc.subjectstereo visionen
dc.subjectvirtual realityen
dc.subjectvisualizationen
dc.titleScalable Resolution Display Wallsen
dc.typeArticleen
dc.identifier.journalProceedings of the IEEEen
dc.contributor.institutionUniversity of Illinois at Chicago, Chicago, United Statesen
dc.contributor.institutionArgonne National Laboratory, Argonne, United Statesen
dc.contributor.institutionTexas Advanced Computing Center, Austin, United Statesen
kaust.grant.numberUS-2008-107/SA-C0064en
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