Optimization Techniques for Dimensionally Truncated Sparse Grids on Heterogeneous Systems

Handle URI:
http://hdl.handle.net/10754/599103
Title:
Optimization Techniques for Dimensionally Truncated Sparse Grids on Heterogeneous Systems
Authors:
Deftu, A.; Murarasu, A.
Abstract:
Given the existing heterogeneous processor landscape dominated by CPUs and GPUs, topics such as programming productivity and performance portability have become increasingly important. In this context, an important question refers to how can we develop optimization strategies that cover both CPUs and GPUs. We answer this for fastsg, a library that provides functionality for handling efficiently high-dimensional functions. As it can be employed for compressing and decompressing large-scale simulation data, it finds itself at the core of a computational steering application which serves us as test case. We describe our experience with implementing fastsg's time critical routines for Intel CPUs and Nvidia Fermi GPUs. We show the differences and especially the similarities between our optimization strategies for the two architectures. With regard to our test case for which achieving high speedups is a "must" for real-time visualization, we report a speedup of up to 6.2x times compared to the state-of-the-art implementation of the sparse grid technique for GPUs. © 2013 IEEE.
Citation:
Deftu A, Murarasu A (2013) Optimization Techniques for Dimensionally Truncated Sparse Grids on Heterogeneous Systems. 2013 21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing. Available: http://dx.doi.org/10.1109/PDP.2013.57.
Publisher:
Institute of Electrical and Electronics Engineers (IEEE)
Journal:
2013 21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing
KAUST Grant Number:
UK-C0020
Issue Date:
Feb-2013
DOI:
10.1109/PDP.2013.57
Type:
Conference Paper
Sponsors:
This publication is based on work supported by Award No.UK-C0020, made by King Abdullah University of Science andTechnology (KAUST).
Appears in Collections:
Publications Acknowledging KAUST Support

Full metadata record

DC FieldValue Language
dc.contributor.authorDeftu, A.en
dc.contributor.authorMurarasu, A.en
dc.date.accessioned2016-02-25T13:52:55Zen
dc.date.available2016-02-25T13:52:55Zen
dc.date.issued2013-02en
dc.identifier.citationDeftu A, Murarasu A (2013) Optimization Techniques for Dimensionally Truncated Sparse Grids on Heterogeneous Systems. 2013 21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing. Available: http://dx.doi.org/10.1109/PDP.2013.57.en
dc.identifier.doi10.1109/PDP.2013.57en
dc.identifier.urihttp://hdl.handle.net/10754/599103en
dc.description.abstractGiven the existing heterogeneous processor landscape dominated by CPUs and GPUs, topics such as programming productivity and performance portability have become increasingly important. In this context, an important question refers to how can we develop optimization strategies that cover both CPUs and GPUs. We answer this for fastsg, a library that provides functionality for handling efficiently high-dimensional functions. As it can be employed for compressing and decompressing large-scale simulation data, it finds itself at the core of a computational steering application which serves us as test case. We describe our experience with implementing fastsg's time critical routines for Intel CPUs and Nvidia Fermi GPUs. We show the differences and especially the similarities between our optimization strategies for the two architectures. With regard to our test case for which achieving high speedups is a "must" for real-time visualization, we report a speedup of up to 6.2x times compared to the state-of-the-art implementation of the sparse grid technique for GPUs. © 2013 IEEE.en
dc.description.sponsorshipThis publication is based on work supported by Award No.UK-C0020, made by King Abdullah University of Science andTechnology (KAUST).en
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.subjectCUDAen
dc.subjectGPUen
dc.subjectlibraryen
dc.subjectoptimizationsen
dc.subjectsparse gridsen
dc.titleOptimization Techniques for Dimensionally Truncated Sparse Grids on Heterogeneous Systemsen
dc.typeConference Paperen
dc.identifier.journal2013 21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processingen
dc.contributor.institutionTechnische Universitat Munchen, Munich, Germanyen
kaust.grant.numberUK-C0020en
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