Methods and devices for silicon integrated vertically aligned field effect transistors

Handle URI:
http://hdl.handle.net/10754/595584
Title:
Methods and devices for silicon integrated vertically aligned field effect transistors
Authors:
Li, Jingqi
Assignee:
King Abdullah University of Science and Technology
Abstract:
Embodiments of the present disclosure provide for vertically aligned CNTFET, methods of making vertically aligned CNTFET, methods of using vertically aligned CNTFET, and the like.
KAUST Department:
Advanced Nanofabrication and Thin Film Core Lab
Issue Date:
19-Nov-2015
Submitted date:
2015-05-13
Type:
Patent
Application Number:
US 20150333282 A1
Patent Status:
Published Application
Additional Links:
http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PG01&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.html&r=1&f=G&l=50&s1=%2220150333282%22.PGNR.&OS=DN/20150333282&RS=DN/20150333282; http://assignment.uspto.gov/#/search?adv=publNum:20150333282; http://www.google.com/patents/US20150333282; http://worldwide.espacenet.com/publicationDetails/biblio?CC=US&NR=2015333282A1&KC=A1&FT=D
Appears in Collections:
Patents; Advanced Nanofabrication, Imaging and Characterization Core Lab

Full metadata record

DC FieldValue Language
dc.contributor.authorLi, Jingqien
dc.date.accessioned2016-02-04T13:29:55Zen
dc.date.available2016-02-04T13:29:55Zen
dc.date.issued2015-11-19en
dc.date.submitted2015-05-13en
dc.identifier.urihttp://hdl.handle.net/10754/595584en
dc.description.abstractEmbodiments of the present disclosure provide for vertically aligned CNTFET, methods of making vertically aligned CNTFET, methods of using vertically aligned CNTFET, and the like.en
dc.relation.urlhttp://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PG01&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.html&r=1&f=G&l=50&s1=%2220150333282%22.PGNR.&OS=DN/20150333282&RS=DN/20150333282en
dc.relation.urlhttp://assignment.uspto.gov/#/search?adv=publNum:20150333282en
dc.relation.urlhttp://www.google.com/patents/US20150333282en
dc.relation.urlhttp://worldwide.espacenet.com/publicationDetails/biblio?CC=US&NR=2015333282A1&KC=A1&FT=Den
dc.titleMethods and devices for silicon integrated vertically aligned field effect transistorsen
dc.typePatenten
dc.contributor.departmentAdvanced Nanofabrication and Thin Film Core Laben
dc.description.statusPublished Applicationen
dc.contributor.assigneeKing Abdullah University of Science and Technologyen
dc.description.countryUnited Statesen
dc.identifier.applicationnumberUS 20150333282 A1en
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