Effect of gate dielectrics on the performance of p-type Cu2O TFTs processed at room temperature

Handle URI:
http://hdl.handle.net/10754/564829
Title:
Effect of gate dielectrics on the performance of p-type Cu2O TFTs processed at room temperature
Authors:
Al-Jawhari, Hala A.; Caraveo-Frescas, Jesus Alfonso
Abstract:
Single-phase Cu2O films with p-type semiconducting properties were successfully deposited by reactive DC magnetron sputtering at room temperature followed by post annealing process at 200°C. Subsequently, such films were used to fabricate bottom gate p-channel Cu2O thin film transistors (TFTs). The effect of using high-κ SrTiO3 (STO) as a gate dielectric on the Cu2O TFT performance was investigated. The results were then compared to our baseline process which uses a 220 nm aluminum titanium oxide (ATO) dielectric deposited on a glass substrate coated with a 200 nm indium tin oxide (ITO) gate electrode. We found that with a 150 nm thick STO, the Cu2O TFTs exhibited a p-type behavior with a field-effect mobility of 0.54 cm2.V-1.s-1, an on/off ratio of around 44, threshold voltage equaling -0.62 V and a sub threshold swing of 1.64 V/dec. These values were obtained at a low operating voltage of -2V. The advantages of using STO as a gate dielectric relative to ATO are discussed. © (2014) Trans Tech Publications, Switzerland.
KAUST Department:
Materials Science and Engineering Program
Publisher:
Trans Tech Publications
Journal:
Advanced Materials Research
Conference/Event name:
2013 2nd International Conference on Material Science and Engineering Technology, ICMSET 2013
Issue Date:
Dec-2013
DOI:
10.4028/www.scientific.net/AMR.856.215
Type:
Conference Paper
ISSN:
10226680
ISBN:
9783037859636
Appears in Collections:
Conference Papers; Materials Science and Engineering Program

Full metadata record

DC FieldValue Language
dc.contributor.authorAl-Jawhari, Hala A.en
dc.contributor.authorCaraveo-Frescas, Jesus Alfonsoen
dc.date.accessioned2015-08-04T07:17:34Zen
dc.date.available2015-08-04T07:17:34Zen
dc.date.issued2013-12en
dc.identifier.isbn9783037859636en
dc.identifier.issn10226680en
dc.identifier.doi10.4028/www.scientific.net/AMR.856.215en
dc.identifier.urihttp://hdl.handle.net/10754/564829en
dc.description.abstractSingle-phase Cu2O films with p-type semiconducting properties were successfully deposited by reactive DC magnetron sputtering at room temperature followed by post annealing process at 200°C. Subsequently, such films were used to fabricate bottom gate p-channel Cu2O thin film transistors (TFTs). The effect of using high-κ SrTiO3 (STO) as a gate dielectric on the Cu2O TFT performance was investigated. The results were then compared to our baseline process which uses a 220 nm aluminum titanium oxide (ATO) dielectric deposited on a glass substrate coated with a 200 nm indium tin oxide (ITO) gate electrode. We found that with a 150 nm thick STO, the Cu2O TFTs exhibited a p-type behavior with a field-effect mobility of 0.54 cm2.V-1.s-1, an on/off ratio of around 44, threshold voltage equaling -0.62 V and a sub threshold swing of 1.64 V/dec. These values were obtained at a low operating voltage of -2V. The advantages of using STO as a gate dielectric relative to ATO are discussed. © (2014) Trans Tech Publications, Switzerland.en
dc.publisherTrans Tech Publicationsen
dc.subjectCuprous oxide thin filmsen
dc.subjectHigh-κ gate dielectricen
dc.subjectP-type TFTsen
dc.subjectSrTiO3 filmsen
dc.titleEffect of gate dielectrics on the performance of p-type Cu2O TFTs processed at room temperatureen
dc.typeConference Paperen
dc.contributor.departmentMaterials Science and Engineering Programen
dc.identifier.journalAdvanced Materials Researchen
dc.conference.date16 November 2013 through 17 November 2013en
dc.conference.name2013 2nd International Conference on Material Science and Engineering Technology, ICMSET 2013en
dc.conference.locationLondonen
dc.contributor.institutionDepartment of Physics, King Abdulaziz University, Jeddah 21589, Saudi Arabiaen
kaust.authorCaraveo-Frescas, Jesus Alfonsoen
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