Hardware realization of chaos based block cipher for image encryption

Handle URI:
http://hdl.handle.net/10754/564475
Title:
Hardware realization of chaos based block cipher for image encryption
Authors:
Barakat, Mohamed L.; Radwan, Ahmed G.; Salama, Khaled N. ( 0000-0001-7742-1282 )
Abstract:
Unlike stream ciphers, block ciphers are very essential for parallel processing applications. In this paper, the first hardware realization of chaotic-based block cipher is proposed for image encryption applications. The proposed system is tested for known cryptanalysis attacks and for different block sizes. When implemented on Virtex-IV, system performance showed high throughput and utilized small area. Passing successfully in all tests, our system proved to be secure with all block sizes. © 2011 IEEE.
KAUST Department:
Electrical Engineering Program; Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division; Physical Sciences and Engineering (PSE) Division; Sensors Lab
Publisher:
Institute of Electrical and Electronics Engineers (IEEE)
Journal:
ICM 2011 Proceeding
Conference/Event name:
2011 23rd International Conference on Microelectronics, ICM 2011
Issue Date:
Dec-2011
DOI:
10.1109/ICM.2011.6177386
Type:
Conference Paper
ISBN:
9781457722073
Appears in Collections:
Conference Papers; Physical Sciences and Engineering (PSE) Division; Electrical Engineering Program; Sensors Lab; Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division

Full metadata record

DC FieldValue Language
dc.contributor.authorBarakat, Mohamed L.en
dc.contributor.authorRadwan, Ahmed G.en
dc.contributor.authorSalama, Khaled N.en
dc.date.accessioned2015-08-04T07:01:57Zen
dc.date.available2015-08-04T07:01:57Zen
dc.date.issued2011-12en
dc.identifier.isbn9781457722073en
dc.identifier.doi10.1109/ICM.2011.6177386en
dc.identifier.urihttp://hdl.handle.net/10754/564475en
dc.description.abstractUnlike stream ciphers, block ciphers are very essential for parallel processing applications. In this paper, the first hardware realization of chaotic-based block cipher is proposed for image encryption applications. The proposed system is tested for known cryptanalysis attacks and for different block sizes. When implemented on Virtex-IV, system performance showed high throughput and utilized small area. Passing successfully in all tests, our system proved to be secure with all block sizes. © 2011 IEEE.en
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.titleHardware realization of chaos based block cipher for image encryptionen
dc.typeConference Paperen
dc.contributor.departmentElectrical Engineering Programen
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Divisionen
dc.contributor.departmentPhysical Sciences and Engineering (PSE) Divisionen
dc.contributor.departmentSensors Laben
dc.identifier.journalICM 2011 Proceedingen
dc.conference.date19 December 2011 through 22 December 2011en
dc.conference.name2011 23rd International Conference on Microelectronics, ICM 2011en
dc.conference.locationHammameten
dc.contributor.institutionElectrical Engineering Program, Applied Engineering Mathematics, Cairo University, Egypten
kaust.authorBarakat, Mohamed L.en
kaust.authorRadwan, Ahmed G.en
kaust.authorSalama, Khaled N.en
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