Power gating of VLSI circuits using MEMS switches in low power applications

Handle URI:
http://hdl.handle.net/10754/564472
Title:
Power gating of VLSI circuits using MEMS switches in low power applications
Authors:
Shobak, Hosam; Ghoneim, Mohamed T. ( 0000-0002-5568-5284 ) ; El Boghdady, Nawal; Halawa, Sarah; Iskander, Sophinese M.; Anis, Mohab H.
Abstract:
Power dissipation poses a great challenge for VLSI designers. With the intense down-scaling of technology, the total power consumption of the chip is made up primarily of leakage power dissipation. This paper proposes combining a custom-designed MEMS switch to power gate VLSI circuits, such that leakage power is efficiently reduced while accounting for performance and reliability. The designed MEMS switch is characterized by an 0.1876 ? ON resistance and requires 4.5 V to switch. As a result of implementing this novel power gating technique, a standby leakage power reduction of 99% and energy savings of 33.3% are achieved. Finally the possible effects of surge currents and ground bounce noise are studied. These findings allow longer operation times for battery-operated systems characterized by long standby periods. © 2011 IEEE.
KAUST Department:
Electrical Engineering Program
Publisher:
Institute of Electrical and Electronics Engineers (IEEE)
Journal:
ICM 2011 Proceeding
Conference/Event name:
2011 23rd International Conference on Microelectronics, ICM 2011
Issue Date:
Dec-2011
DOI:
10.1109/ICM.2011.6177407
Type:
Conference Paper
ISBN:
9781457722073
Appears in Collections:
Conference Papers; Electrical Engineering Program

Full metadata record

DC FieldValue Language
dc.contributor.authorShobak, Hosamen
dc.contributor.authorGhoneim, Mohamed T.en
dc.contributor.authorEl Boghdady, Nawalen
dc.contributor.authorHalawa, Sarahen
dc.contributor.authorIskander, Sophinese M.en
dc.contributor.authorAnis, Mohab H.en
dc.date.accessioned2015-08-04T07:01:53Zen
dc.date.available2015-08-04T07:01:53Zen
dc.date.issued2011-12en
dc.identifier.isbn9781457722073en
dc.identifier.doi10.1109/ICM.2011.6177407en
dc.identifier.urihttp://hdl.handle.net/10754/564472en
dc.description.abstractPower dissipation poses a great challenge for VLSI designers. With the intense down-scaling of technology, the total power consumption of the chip is made up primarily of leakage power dissipation. This paper proposes combining a custom-designed MEMS switch to power gate VLSI circuits, such that leakage power is efficiently reduced while accounting for performance and reliability. The designed MEMS switch is characterized by an 0.1876 ? ON resistance and requires 4.5 V to switch. As a result of implementing this novel power gating technique, a standby leakage power reduction of 99% and energy savings of 33.3% are achieved. Finally the possible effects of surge currents and ground bounce noise are studied. These findings allow longer operation times for battery-operated systems characterized by long standby periods. © 2011 IEEE.en
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.titlePower gating of VLSI circuits using MEMS switches in low power applicationsen
dc.typeConference Paperen
dc.contributor.departmentElectrical Engineering Programen
dc.identifier.journalICM 2011 Proceedingen
dc.conference.date19 December 2011 through 22 December 2011en
dc.conference.name2011 23rd International Conference on Microelectronics, ICM 2011en
dc.conference.locationHammameten
dc.contributor.institutionAmerican University, Cairo, Egypten
kaust.authorGhoneim, Mohamed T.en
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