A novel match-line selective charging scheme for high-speed, low-power and noise-tolerant content-addressable memory

Handle URI:
http://hdl.handle.net/10754/564280
Title:
A novel match-line selective charging scheme for high-speed, low-power and noise-tolerant content-addressable memory
Authors:
Hasan, Muhammad Mubashwar; Rashid, Abdul B M Harun Ur; Hussain, Muhammad Mustafa ( 0000-0003-3279-0441 )
Abstract:
Content-addressable memory (CAM) is an essential component for high-speed lookup intensive applications. This paper presents a match-line selective charging technique to increase speed and reduce the energy per bit per search while increasing the noise-tolerance. Simulation in TSMC 0.18 μm technology with 64×72 Ternary CAM shows the match-line energy reduction of 45% compared to the conventional currentsaving scheme with the reduction of minimum cycle time by 68% and the improvement of noise-tolerance by 96%.
KAUST Department:
Electrical Engineering Program; Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division; Integrated Nanotechnology Lab
Publisher:
Institute of Electrical and Electronics Engineers (IEEE)
Journal:
2010 International Conference on Intelligent and Advanced Systems
Conference/Event name:
2010 International Conference on Intelligent and Advanced Systems, ICIAS 2010
Issue Date:
Jun-2010
DOI:
10.1109/ICIAS.2010.5716226
Type:
Conference Paper
ISBN:
9781424466238
Appears in Collections:
Conference Papers; Electrical Engineering Program; Integrated Nanotechnology Lab; Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) Division

Full metadata record

DC FieldValue Language
dc.contributor.authorHasan, Muhammad Mubashwaren
dc.contributor.authorRashid, Abdul B M Harun Uren
dc.contributor.authorHussain, Muhammad Mustafaen
dc.date.accessioned2015-08-04T06:21:58Zen
dc.date.available2015-08-04T06:21:58Zen
dc.date.issued2010-06en
dc.identifier.isbn9781424466238en
dc.identifier.doi10.1109/ICIAS.2010.5716226en
dc.identifier.urihttp://hdl.handle.net/10754/564280en
dc.description.abstractContent-addressable memory (CAM) is an essential component for high-speed lookup intensive applications. This paper presents a match-line selective charging technique to increase speed and reduce the energy per bit per search while increasing the noise-tolerance. Simulation in TSMC 0.18 μm technology with 64×72 Ternary CAM shows the match-line energy reduction of 45% compared to the conventional currentsaving scheme with the reduction of minimum cycle time by 68% and the improvement of noise-tolerance by 96%.en
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.titleA novel match-line selective charging scheme for high-speed, low-power and noise-tolerant content-addressable memoryen
dc.typeConference Paperen
dc.contributor.departmentElectrical Engineering Programen
dc.contributor.departmentComputer, Electrical and Mathematical Sciences and Engineering (CEMSE) Divisionen
dc.contributor.departmentIntegrated Nanotechnology Laben
dc.identifier.journal2010 International Conference on Intelligent and Advanced Systemsen
dc.conference.date15 June 2010 through 17 June 2010en
dc.conference.name2010 International Conference on Intelligent and Advanced Systems, ICIAS 2010en
dc.conference.locationKuala Lumpuren
dc.contributor.institutionBangladesh University of Engineering and Technology, Dhaka-1000, Bangladeshen
kaust.authorHussain, Muhammad Mustafaen
kaust.authorHasan, Muhammad Mubashwaren
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